DOE Patents title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Method for deposition of a conductor in integrated circuits

Abstract

A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten.

Inventors:
 [1];  [1];  [1];  [1]
  1. Albuquerque, NM
Issue Date:
Research Org.:
AT&T
OSTI Identifier:
871129
Patent Number(s):
5663098
Assignee:
Sandia Corporation (Albuquerque, NM)
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
AC04-76DP00789
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
method; deposition; conductor; integrated; circuits; described; fabricating; semiconductor; particularly; selective; substrate; employing; chemical; vapor; process; example; tungsten; selectively; deposited; silicon; onset; loss; selectivity; interrupted; unwanted; mask; layer; removed; halogen; etchant; thereafter; plurality; etch; cycles; carried; achieve; predetermined; thickness; predetermined thickness; chemical vapor; vapor deposition; silicon substrate; integrated circuits; integrated circuit; deposition process; mask layer; /438/

Citation Formats

Creighton, J Randall, Dominguez, Frank, Johnson, A Wayne, and Omstead, Thomas R. Method for deposition of a conductor in integrated circuits. United States: N. p., 1997. Web.
Creighton, J Randall, Dominguez, Frank, Johnson, A Wayne, & Omstead, Thomas R. Method for deposition of a conductor in integrated circuits. United States.
Creighton, J Randall, Dominguez, Frank, Johnson, A Wayne, and Omstead, Thomas R. Wed . "Method for deposition of a conductor in integrated circuits". United States. https://www.osti.gov/servlets/purl/871129.
@article{osti_871129,
title = {Method for deposition of a conductor in integrated circuits},
author = {Creighton, J Randall and Dominguez, Frank and Johnson, A Wayne and Omstead, Thomas R},
abstractNote = {A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Wed Jan 01 00:00:00 EST 1997},
month = {Wed Jan 01 00:00:00 EST 1997}
}

Works referenced in this record:

Selective Tungsten on Silicon by the Alternating Cyclic, AC, Hydrogen Reduction of  WF 6
journal, February 1990