Engineering Tunneling Selector to Achieve High Non-linearity for 1S1R Integration

Upadhyay, Navnidhi K.; Blum, Thomas; Maksymovych, Petro; Lavrik, Nickolay V.; Davila, Noraica; Katine, Jordan A.; Ievlev, A. V.; Chi, Miaofang; Xia, Qiangfei; Yang, J. Joshua

doi:10.3389/fnano.2021.656026

Title: Engineering Tunneling Selector to Achieve High Non-linearity for 1S1R Integration

Abstract

Memristor devices have been extensively studied as one of the most promising technologies for next-generation non-volatile memory. However, for the memristor devices to have a real technological impact, they must be densely packed in a large crossbar array (CBA) exceeding Gigabytes in size. Devising a selector device that is CMOS compatible, 3D stackable, and has a high non-linearity (NL) and great endurance is a crucial enabling ingredient to reach this goal. Tunneling based selectors are very promising in these aspects, but the mediocre NL value limits their applications in large passive crossbar arrays. In this work, we demonstrated a trilayer tunneling selector based on the Ge/Pt/TaN_1+x/Ta₂O₅/TaN_1+x/Pd layers that could achieve a NL of 3 × 10⁵, which is the highest NL achieved using a tunnel selector so far. The record-high tunneling NL is partially attributed to the bottom electrode's ultra-smoothness (BE) induced by a Ge/Pt layer. We further demonstrated the feasibility of 1S1R (1-selector 1-resistor) integration by vertically integrating a Pd/Ta₂O₅/Ru based memristor on top of the proposed selector.

Authors:

Upadhyay, Navnidhi K. ^[1]; Blum, Thomas ^[2];

^[2];

^[2]; Davila, Noraica ^[3]; Katine, Jordan A. ^[3];

^[2];

^[2]; Xia, Qiangfei ^[4]; Yang, J. Joshua ^[5]

Univ. of Massachusetts, Amherst, MA (United States); Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)
Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)
Western Digital, San Jose, CA (United States)
Univ. of Massachusetts, Amherst, MA (United States)
Univ. of Massachusetts, Amherst, MA (United States); Univ. of Southern California, Los Angeles, CA (United States)

Publication Date:: Thu Apr 15 00:00:00 EDT 2021

Research Org.:: Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1817406

Grant/Contract Number:: AC05-00OR22725

Resource Type:: Accepted Manuscript

Journal Name:: Frontiers in Nanotechnology

Additional Journal Information:: Journal Volume: 3; Journal Issue: 656026; Journal ID: ISSN 2673-3013

Publisher:: Frontiers Media S.A.

Country of Publication:: United States

Language:: English

Subject:: 77 NANOSCIENCE AND NANOTECHNOLOGY; selectors; high non-linearity; vertically integrated 1S1R; crossbar arrays; memristor

Citation Formats


                    Upadhyay, Navnidhi K., Blum, Thomas, Maksymovych, Petro, Lavrik, Nickolay V., Davila, Noraica, Katine, Jordan A., Ievlev, A. V., Chi, Miaofang, Xia, Qiangfei, and Yang, J. Joshua. Engineering Tunneling Selector to Achieve High Non-linearity for 1S1R Integration.  United States: N. p., 2021. 
Web.  doi:10.3389/fnano.2021.656026.

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                    Upadhyay, Navnidhi K., Blum, Thomas, Maksymovych, Petro, Lavrik, Nickolay V., Davila, Noraica, Katine, Jordan A., Ievlev, A. V., Chi, Miaofang, Xia, Qiangfei, & Yang, J. Joshua. Engineering Tunneling Selector to Achieve High Non-linearity for 1S1R Integration.  United States.  https://doi.org/10.3389/fnano.2021.656026

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                    Upadhyay, Navnidhi K., Blum, Thomas, Maksymovych, Petro, Lavrik, Nickolay V., Davila, Noraica, Katine, Jordan A., Ievlev, A. V., Chi, Miaofang, Xia, Qiangfei, and Yang, J. Joshua. Thu .  
"Engineering Tunneling Selector to Achieve High Non-linearity for 1S1R Integration".  United States.  https://doi.org/10.3389/fnano.2021.656026.  https://www.osti.gov/servlets/purl/1817406.

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@article{osti_1817406,

  title        = {Engineering Tunneling Selector to Achieve High Non-linearity for 1S1R Integration},

  author       = {Upadhyay, Navnidhi K. and Blum, Thomas and Maksymovych, Petro and Lavrik, Nickolay V. and Davila, Noraica and Katine, Jordan A. and Ievlev, A. V. and Chi, Miaofang and Xia, Qiangfei and Yang, J. Joshua},

  abstractNote = {Memristor devices have been extensively studied as one of the most promising technologies for next-generation non-volatile memory. However, for the memristor devices to have a real technological impact, they must be densely packed in a large crossbar array (CBA) exceeding Gigabytes in size. Devising a selector device that is CMOS compatible, 3D stackable, and has a high non-linearity (NL) and great endurance is a crucial enabling ingredient to reach this goal. Tunneling based selectors are very promising in these aspects, but the mediocre NL value limits their applications in large passive crossbar arrays. In this work, we demonstrated a trilayer tunneling selector based on the Ge/Pt/TaN1+x/Ta2O5/TaN1+x/Pd layers that could achieve a NL of 3 × 105, which is the highest NL achieved using a tunnel selector so far. The record-high tunneling NL is partially attributed to the bottom electrode's ultra-smoothness (BE) induced by a Ge/Pt layer. We further demonstrated the feasibility of 1S1R (1-selector 1-resistor) integration by vertically integrating a Pd/Ta2O5/Ru based memristor on top of the proposed selector.},

  doi          = {10.3389/fnano.2021.656026},

  journal      = {Frontiers in Nanotechnology},

  number       = 656026,

  volume       = 3,

  place        = {United States},

  year         = {Thu Apr 15 00:00:00 EDT 2021},

  month        = {Thu Apr 15 00:00:00 EDT 2021}

}

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Title: Engineering Tunneling Selector to Achieve High Non-linearity for 1S1R Integration

Abstract

Citation Formats

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