Patterned nanochannel sacrificial layer for semiconductor substrate reuse
Abstract
Described herein are systems and methods of utilizing nanochannels generated in the sacrificial layer of a semiconductor substrate to increase epitaxial lift-off speeds and facilitate reusability of GaAs substrates. The provided systems and methods may utilize unique nanochannel geometries to increase the surface area exposed to the etchant and further decrease etch times.
- Inventors:
- Issue Date:
- Research Org.:
- National Renewable Energy Laboratory (NREL), Golden, CO (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 2293930
- Patent Number(s):
- 11830733
- Application Number:
- 17/656,762
- Assignee:
- Alliance for Sustainable Energy, LLC (Golden, CO)
- DOE Contract Number:
- AC36-08GO28308
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 03/28/2022
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Mangum, John Stanley, McMahon, William Edwin, Warren, Emily Lowell, and Theingi, San. Patterned nanochannel sacrificial layer for semiconductor substrate reuse. United States: N. p., 2023.
Web.
Mangum, John Stanley, McMahon, William Edwin, Warren, Emily Lowell, & Theingi, San. Patterned nanochannel sacrificial layer for semiconductor substrate reuse. United States.
Mangum, John Stanley, McMahon, William Edwin, Warren, Emily Lowell, and Theingi, San. Tue .
"Patterned nanochannel sacrificial layer for semiconductor substrate reuse". United States. https://www.osti.gov/servlets/purl/2293930.
@article{osti_2293930,
title = {Patterned nanochannel sacrificial layer for semiconductor substrate reuse},
author = {Mangum, John Stanley and McMahon, William Edwin and Warren, Emily Lowell and Theingi, San},
abstractNote = {Described herein are systems and methods of utilizing nanochannels generated in the sacrificial layer of a semiconductor substrate to increase epitaxial lift-off speeds and facilitate reusability of GaAs substrates. The provided systems and methods may utilize unique nanochannel geometries to increase the surface area exposed to the etchant and further decrease etch times.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2023},
month = {11}
}
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