Title: High voltage MOSFET devices and methods of making the devices

Abstract

A SiC MOSFET device having low specific on resistance is described. The device has N+, P-well and JFET regions extended in one direction (Y-direction) and P+ and source contacts extended in an orthogonal direction (X-direction). The polysilicon gate of the device covers the JFET region and is terminated over the P-well region to minimize electric field at the polysilicon gate edge. In use, current flows vertically from the drain contact at the bottom of the structure into the JFET region and then laterally in the X direction through the accumulation region and through the MOSFET channels into the adjacent N+ region. The current flowing out of the channel then flows along the N+ region in the Y-direction and is collected by the source contacts and the final metal. Methods of making the device are also described.

Inventors:

Banerjee, Sujit; Matocha, Kevin; Chatty, Kiran

Issue Date:

Tue Jun 05 00:00:00 EDT 2018

Research Org.:

US Department of Energy (USDOE), Washington, DC (United States). Advanced Research Projects Agency-Energy (ARPA-E)

Sponsoring Org.:

USDOE

OSTI Identifier:

1455223

Patent Number(s):

9991376

Application Number:

14/966,476

Assignee:

Monolith Semiconductor Inc. (Round Rock, TX)

Patent Classifications (CPCs):

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

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H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

H01L29/0696 - {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
H01L29/0869 - {Shape
H01L29/0878 - {Impurity concentration or distribution}
H01L29/1095 - {Body region, i.e. base region, of DMOS transistors or IGBTs
H01L29/1608 - {Silicon carbide}
H01L29/42356 - {Disposition, e.g. buried gate electrode
H01L29/4238 - {characterised by the surface lay-out}
H01L29/456 - {on silicon}
H01L29/66068 - {the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices}
H01L29/7802 - {Vertical DMOS transistors, i.e. VDMOS transistors}
H01L29/7827 - {Vertical transistors

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DOE Contract Number:  

AR0000442

Resource Type:

Patent

Resource Relation:

Patent File Date: 2015 Dec 11

Country of Publication:

United States

Language:

English

Subject:

42 ENGINEERING