Title: High voltage MOSFET devices and methods of making the devices

Abstract

A SiC MOSFET device having low specific on resistance is described. The device has N+, P-well and JFET regions extended in one direction (Y-direction) and P+ and source contacts extended in an orthogonal direction (X-direction). The polysilicon gate of the device covers the JFET region and is terminated over the P-well region to minimize electric field at the polysilicon gate edge. In use, current flows vertically from the drain contact at the bottom of the structure into the JFET region and then laterally in the X direction through the accumulation region and through the MOSFET channels into the adjacent N+ region. The current flowing out of the channel then flows along the N+ region in the Y-direction and is collected by the source contacts and the final metal. Methods of making the device are also described.

Inventors:

Banerjee, Sujit; Matocha, Kevin; Chatty, Kiran

Issue Date:

2019-07-23

Research Org.:

Monolith Semiconductor Inc., Round Rock, TX (United States)

Sponsoring Org.:

USDOE

OSTI Identifier:

1568638

Patent Number(s):

10361302

Application Number:

15/793,562

Assignee:

Monolith Semiconductor Inc. (Round Rock, TX)

Patent Classifications (CPCs):

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

Show more

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

H01L29/4238 - {characterised by the surface lay-out}
H01L29/0878 - {Impurity concentration or distribution}
H01L29/7806 - {the other device being a Schottky barrier diode}
H01L21/22 - Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions
H01L29/0696 - {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
H01L29/66712 - {Vertical DMOS transistors, i.e. VDMOS transistors}
H01L29/456 - {on silicon}
H01L29/6606 - {the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices}
H01L29/8083 - {Vertical transistors
H01L29/1608 - {Silicon carbide}
H01L29/7827 - {Vertical transistors
H01L29/66893 - {with a PN junction gate, i.e. JFET}
H01L29/42356 - {Disposition, e.g. buried gate electrode
H01L21/046 - {using ion implantation}
H01L29/66068 - {the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices}
H01L29/1095 - {Body region, i.e. base region, of DMOS transistors or IGBTs
H01L29/7802 - {Vertical DMOS transistors, i.e. VDMOS transistors}

Show less

DOE Contract Number:  

AR0000442

Resource Type:

Patent

Resource Relation:

Patent File Date: 10/25/2017

Country of Publication:

United States

Language:

English