High voltage semiconductor devices and methods of making the devices

Title: High voltage semiconductor devices and methods of making the devices

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.

Inventors:: Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

Issue Date:: 2018-01-23

OSTI Identifier:: 1417850

Assignee:: Monolith Semiconductor Inc. (Round Rock, TX) ARPA-E

Patent Number(s):: 9,876,104

Application Number:: 15/412,462

Contract Number:: AR0000442

Resource Relation:: Patent File Date: 2017 Jan 23

Research Org:: Monolith Semiconductor Inc., Round Rock, TX (United States)

Sponsoring Org:: USDOE

Country of Publication:: United States

Language:: English

Subject:: 36 MATERIALS SCIENCE

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Works referenced in this record:

Improvement of the electrical safe operating area of a DMOS transistor during ESD events
conference, April 2009

Podgaynaya, Alevtina; Pogany, Dionyz; Gornik, Erich
Reliability Physics Symposium, 2009 IEEE International
DOI: 10.1109/IRPS.2009.5173293

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