Electrical measurements for CMOS IC stuck-open faults
Two incidences of IC failure due to the CMOS stuck-open fault are reported here. The voltage levels, quiescent power supply current (I/sub DDQ/), transient response, and tester properties associated with these defects are reported. The transient response of the defective node voltage and power supply current to the high impedance state caused by these defects was measured to determine if the I/sub DDQ/ measurement technique could detect stuck-open faults. The results show that the I/sub DDQ/ technique does detect stuck-open faults in some designs, but detection is not guaranteed for all circuits. Modifications to the circuit layout to reduce the probability of the stuck-open fault occurrence are presented. 22 refs., 7 figs.
- Research Organization:
- Sandia National Labs., Albuquerque, NM (USA)
- DOE Contract Number:
- AC04-76DP00789
- OSTI ID:
- 5945894
- Report Number(s):
- SAND-88-3442C; CONF-890846-1; ON: DE89005924
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
420800* -- Engineering-- Electronic Circuits & Devices-- (-1989)
DESIGN
ELECTRICAL FAULTS
ELECTRICAL PROPERTIES
ELECTRONIC CIRCUITS
FAILURES
INTEGRATED CIRCUITS
LOGIC CIRCUITS
MEASURING METHODS
MICROELECTRONIC CIRCUITS
MOS TRANSISTORS
PHYSICAL PROPERTIES
SEMICONDUCTOR DEVICES
TRANSISTORS