Per-instruction energy debugging using instruction sampling hardware

Wei, Shijia; Greathouse, Joseph L.; Kalamatianos, John

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Title: Per-instruction energy debugging using instruction sampling hardware

Abstract

A processor utilizes instruction based sampling to generate sampling data sampled on a per instruction basis during execution of an instruction. The sampling data indicates what processor hardware was used due to the execution of the instruction. Software receives the sampling data and generates an estimate of energy used by the instruction based on the sampling data. The sampling data may include microarchitectural events and the energy estimate utilizes a base energy amount corresponding to the instruction executed along with energy amounts corresponding to the microarchitectural events in the sampling data. The sampling data may include switching events associated with hardware blocks that switched due to execution of the instruction and the energy estimate for the instruction is based on the switching events and capacitance estimates associated with the hardware blocks.

Inventors:: Wei, Shijia; Greathouse, Joseph L.; Kalamatianos, John

Issue Date:: Tue Jan 17 00:00:00 EST 2023

Research Org.:: Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Advanced Micro Devices, Inc., Santa Clara, CA (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1987051

Patent Number(s):: 11556162

Application Number:: 15/923,153

Assignee:: Advanced Micro Devices, Inc. (Santa Clara, CA)

DOE Contract Number:: AC52-07NA27344; B620717

Resource Type:: Patent

Resource Relation:: Patent File Date: 03/16/2018

Country of Publication:: United States

Language:: English

Citation Formats


                    Wei, Shijia, Greathouse, Joseph L., and Kalamatianos, John. Per-instruction energy debugging using instruction sampling hardware.  United States: N. p., 2023. 
        Web.

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                    Wei, Shijia, Greathouse, Joseph L., & Kalamatianos, John. Per-instruction energy debugging using instruction sampling hardware.  United States.

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                    Wei, Shijia, Greathouse, Joseph L., and Kalamatianos, John. Tue .  
        "Per-instruction energy debugging using instruction sampling hardware".  United States.  https://www.osti.gov/servlets/purl/1987051.

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@article{osti_1987051,

  title        = {Per-instruction energy debugging using instruction sampling hardware},

  author       = {Wei, Shijia and Greathouse, Joseph L. and Kalamatianos, John},

  abstractNote = {A processor utilizes instruction based sampling to generate sampling data sampled on a per instruction basis during execution of an instruction. The sampling data indicates what processor hardware was used due to the execution of the instruction. Software receives the sampling data and generates an estimate of energy used by the instruction based on the sampling data. The sampling data may include microarchitectural events and the energy estimate utilizes a base energy amount corresponding to the instruction executed along with energy amounts corresponding to the microarchitectural events in the sampling data. The sampling data may include switching events associated with hardware blocks that switched due to execution of the instruction and the energy estimate for the instruction is based on the switching events and capacitance estimates associated with the hardware blocks.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {Tue Jan 17 00:00:00 EST 2023},

  month        = {Tue Jan 17 00:00:00 EST 2023}

}

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Title: Per-instruction energy debugging using instruction sampling hardware

Abstract

Citation Formats

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Multi-core microprocessor that dynamically designates one of its processing cores as the bootstrap processor
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