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Title: System for processing an encrypted instruction stream in hardware

A system and method of processing an encrypted instruction stream in hardware is disclosed. Main memory stores the encrypted instruction stream and unencrypted data. A central processing unit (CPU) is operatively coupled to the main memory. A decryptor is operatively coupled to the main memory and located within the CPU. The decryptor decrypts the encrypted instruction stream upon receipt of an instruction fetch signal from a CPU core. Unencrypted data is passed through to the CPU core without decryption upon receipt of a data fetch signal.
Inventors:
; ;
Issue Date:
OSTI Identifier:
1246889
Assignee:
BATTELLE MEMORIAL INSTITUTE (Richland, WA) PNNL
Patent Number(s):
9,311,493
Application Number:
13/954,487
Contract Number:
AC05-76RL01830
Resource Relation:
Patent File Date: 2013 Jul 30
Research Org:
Pacific Northwest National Lab. (PNNL), Richland, WA (United States)
Sponsoring Org:
USDOE
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING; 99 GENERAL AND MISCELLANEOUS

Other works cited in this record:

Countering code-injection attacks with instruction-set randomization
conference, January 2003
  • Kc, Gaurav S.; Keromytis, Angelos D.; Prevelakis, Vassilis
  • CCS '03 Proceedings of the 10th ACM conference on Computer and communications security, p. 272-280
  • DOI: 10.1145/948109.948146

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