System for processing an encrypted instruction stream in hardware
Abstract
A system and method of processing an encrypted instruction stream in hardware is disclosed. Main memory stores the encrypted instruction stream and unencrypted data. A central processing unit (CPU) is operatively coupled to the main memory. A decryptor is operatively coupled to the main memory and located within the CPU. The decryptor decrypts the encrypted instruction stream upon receipt of an instruction fetch signal from a CPU core. Unencrypted data is passed through to the CPU core without decryption upon receipt of a data fetch signal.
- Inventors:
- Issue Date:
- Research Org.:
- Pacific Northwest National Laboratory (PNNL), Richland, WA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1246889
- Patent Number(s):
- 9311493
- Application Number:
- 13/954,487
- Assignee:
- BATTELLE MEMORIAL INSTITUTE (Richland, WA)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- AC05-76RL01830
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2013 Jul 30
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING; 99 GENERAL AND MISCELLANEOUS
Citation Formats
Griswold, Richard L., Nickless, William K., and Conrad, Ryan C. System for processing an encrypted instruction stream in hardware. United States: N. p., 2016.
Web.
Griswold, Richard L., Nickless, William K., & Conrad, Ryan C. System for processing an encrypted instruction stream in hardware. United States.
Griswold, Richard L., Nickless, William K., and Conrad, Ryan C. Tue .
"System for processing an encrypted instruction stream in hardware". United States. https://www.osti.gov/servlets/purl/1246889.
@article{osti_1246889,
title = {System for processing an encrypted instruction stream in hardware},
author = {Griswold, Richard L. and Nickless, William K. and Conrad, Ryan C.},
abstractNote = {A system and method of processing an encrypted instruction stream in hardware is disclosed. Main memory stores the encrypted instruction stream and unencrypted data. A central processing unit (CPU) is operatively coupled to the main memory. A decryptor is operatively coupled to the main memory and located within the CPU. The decryptor decrypts the encrypted instruction stream upon receipt of an instruction fetch signal from a CPU core. Unencrypted data is passed through to the CPU core without decryption upon receipt of a data fetch signal.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2016},
month = {4}
}
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