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Title: Hardware packet pacing using a DMA in a parallel computer

Abstract

Method and system for hardware packet pacing using a direct memory access controller in a parallel computer which, in one aspect, keeps track of a total number of bytes put on the network as a result of a remote get operation, using a hardware token counter.

Inventors:
; ;
Issue Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1092967
Patent Number(s):
8509255
Application Number:
11/768,682
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Chen, Dong, Heidelberger, Phillip, and Vranas, Pavlos. Hardware packet pacing using a DMA in a parallel computer. United States: N. p., 2013. Web.
Chen, Dong, Heidelberger, Phillip, & Vranas, Pavlos. Hardware packet pacing using a DMA in a parallel computer. United States.
Chen, Dong, Heidelberger, Phillip, and Vranas, Pavlos. Tue . "Hardware packet pacing using a DMA in a parallel computer". United States. https://www.osti.gov/servlets/purl/1092967.
@article{osti_1092967,
title = {Hardware packet pacing using a DMA in a parallel computer},
author = {Chen, Dong and Heidelberger, Phillip and Vranas, Pavlos},
abstractNote = {Method and system for hardware packet pacing using a direct memory access controller in a parallel computer which, in one aspect, keeps track of a total number of bytes put on the network as a result of a remote get operation, using a hardware token counter.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2013},
month = {8}
}

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