Self-pacing direct memory access data transfer operations for compute nodes in a parallel computer

Blocksome, Michael A

Title: Self-pacing direct memory access data transfer operations for compute nodes in a parallel computer

Abstract

Methods, apparatus, and products are disclosed for self-pacing DMA data transfer operations for nodes in a parallel computer that include: transferring, by an origin DMA on an origin node, a RTS message to a target node, the RTS message specifying an message on the origin node for transfer to the target node; receiving, in an origin injection FIFO for the origin DMA from a target DMA on the target node in response to transferring the RTS message, a target RGET descriptor followed by a DMA transfer operation descriptor, the DMA descriptor for transmitting a message portion to the target node, the target RGET descriptor specifying an origin RGET descriptor on the origin node that specifies an additional DMA descriptor for transmitting an additional message portion to the target node; processing, by the origin DMA, the target RGET descriptor; and processing, by the origin DMA, the DMA transfer operation descriptor.

Inventors:: Blocksome, Michael A

Issue Date:: 2015-02-17

Research Org.:: International Business Machines Corp., Armonk, NY (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1170375

Patent Number(s):: 8959172

Application Number:: 11/829,339

Assignee:: International Business Machines Corporation (Armonk, NY)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F13/28 - using burst mode transfer, e.g. direct memory access {DMA}, cycle steal

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DOE Contract Number:: B554331

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

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                    Blocksome, Michael A. Self-pacing direct memory access data transfer operations for compute nodes in a parallel computer.  United States: N. p., 2015. 
        Web.

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                    Blocksome, Michael A. Self-pacing direct memory access data transfer operations for compute nodes in a parallel computer.  United States.

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                    Blocksome, Michael A. Tue .  
        "Self-pacing direct memory access data transfer operations for compute nodes in a parallel computer".  United States.  https://www.osti.gov/servlets/purl/1170375.

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@article{osti_1170375,

  title        = {Self-pacing direct memory access data transfer operations for compute nodes in a parallel computer},

  author       = {Blocksome, Michael A},

  abstractNote = {Methods, apparatus, and products are disclosed for self-pacing DMA data transfer operations for nodes in a parallel computer that include: transferring, by an origin DMA on an origin node, a RTS message to a target node, the RTS message specifying an message on the origin node for transfer to the target node; receiving, in an origin injection FIFO for the origin DMA from a target DMA on the target node in response to transferring the RTS message, a target RGET descriptor followed by a DMA transfer operation descriptor, the DMA descriptor for transmitting a message portion to the target node, the target RGET descriptor specifying an origin RGET descriptor on the origin node that specifies an additional DMA descriptor for transmitting an additional message portion to the target node; processing, by the origin DMA, the target RGET descriptor; and processing, by the origin DMA, the DMA transfer operation descriptor.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2015},

  month        = {2}

}

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Works referenced in this record:

I/O control system using buffer full/empty and zero words signals to control DMA read/write commands
patent, June 1990

Sera, Akihiro; Goukon, Kazuhiko; Shibata, Yuji
US Patent Document 4,933,840
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/4933840

Network communications adapter with dual interleaved memory banks servicing multiple processors
patent, June 1990

Humphrey, Donald J.; Hughes, James P.; Peterson, Wayne A.
US Patent Document 4,933,846
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/4933846

Congestion free packet network
patent, September 1991

Golestani, S. Jamaloddin
US Patent Document 5,050,162
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5050162

Bulk-synchronous parallel computer
patent, January 1992

Valiant, Leslie G.
US Patent Document 5,083,265
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5083265

Memory management system and method for network controller
patent, August 1992

Firoozmand, Farzin
US Patent Document 5,136,582
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5136582

Arrangement of DMA, interrupt and timer functions to implement symmetrical processing in a multiprocessor computer system
patent, July 1995

Culley, Paul R.; Landry, John A.; Mayer, Dale J.
US Patent Document 5,437,042
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5437042

Inter-processor communication system in which messages are stored at locations specified by the sender
patent, September 1995

Wilkes, Andrew J.
US Patent Document 5,448,698
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5448698

Message passing system for distributed shared memory multiprocessor system and message passing method using the same
patent, April 1997

Yamada, Shigeki; Maruyama, Katsumi; Kubota, Minoru
US Patent Document 5,617,537
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5617537

Expedited message transfer in a multi-nodal data processing system
patent, May 1997

Brady, James T.; Finney, Damon W.; Nowlen, David R.
US Patent Document 5,630,059
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5630059

Static routing system
patent, October 1997

Hashimoto, Akira; Tamiya, Hirokazu
US Patent Document 5,680,116
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5680116

Apparatus and method for packetizing and segmenting MPEG packets
patent, November 1997

Gaytan, Andre J.; Gentry, Denny; Oskouy, Rasoul Mirzazadeh
US Patent Document 5,689,509
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5689509

Barrier and eureka synchronization architecture for multiprocessors
patent, February 1998

Kessler, Richard E.; Oberlin, Steven M.; Thorson, Gregory Michael
US Patent Document 5,721,921
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5721921

Multimedia communication apparatus and methods
patent, May 1998

Graziano, Michael J.; Hauris, Jon F.; Stanley, Daniel L.
US Patent Document 5,758,075
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5758075

Parallel process scheduling method in a parallel computer and a processing apparatus for a parallel computer
patent, July 1998

Ueno, Haruhiko
US Patent Document 5,781,775
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5781775

Message-passing multiprocessor system
patent, August 1998

Moh, Sang Man; Shin, Sang Seok; Yoon, Suk Han
US Patent Document 5,790,530
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5790530

System and method for transmission rate control in a segmentation and reassembly (SAR) circuit under ATM protocol
patent, August 1998

Miller, Michael J.; Murtaza, Bilal; Sun, Chih-Ping
US Patent Document 5,796,735
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5796735

Parallel I/O network file server architecture
patent, September 1998

Row, Edward John; Boucher, Laurence B.; Pitts, William M.
US Patent Document 5,802,366
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5802366

Parallel computer system with communications network for selecting computer nodes for barrier synchronization
patent, July 1999

Horie, Takeshi; Nagatsuka, Masaaki; Kobayashi, Kenichi
US Patent Document 5,928,351
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5928351

Computer system data I/O by reference among I/O devices and multiple memory units
patent, September 1999

Fishler, Leonard R.; Zargham, Bahman
US Patent Document 5,954,794
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5954794

Independent simultaneous queueing of message descriptors
patent, October 1999

Benner, Alan F.
US Patent Document 5,961,659
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5961659

Signaling communication events in a computer network
patent, May 2000

Bender, Carl A.; DiNicola, Paul D.; Gildea, Kevin J.
US Patent Document 6,070,189
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6070189

Multi-tasking adapter for parallel network applications
patent, June 2000

Feeney, James William; Olnowich, Howard Thomas; Wilhelm, Jr., George William
US Patent Document 6,072,781
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6072781

Seralized race-free virtual barrier network
patent, July 2000

Thorson, Greg; Passint, Randal S.; Scott, Steven L.
US Patent Document 6,085,303
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6085303

I/O protocol for highly configurable multi-node processing system
patent, August 2000

Muller, P. Keith; Chow, Kit M.
US Patent Document 6,105,122
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6105122

System for providing transaction indivisibility in a transaction processing system upon recovery from a host processor failure by monitoring source message sequencing
patent, December 2000

Hill, Michael J.; Cooper, Thomas P.; Konrad, Dennis R.
US Patent Document 6,161,198
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6161198

System for parsing a packet for conformity with a predetermined protocol using mask and comparison values included in a parsing instruction
patent, March 2002

Gentry, Jr., Denton E.
US Patent Document 6,356,951
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6356951

Method and apparatus for write-back caching with minimal interrupts
patent, March 2004

Chow, Kit M.; Muller, P. Keith; Meyer, Michael W.
US Patent Document 6,711,632
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6711632

Method and apparatus for improving bus efficiency given an array of frames to transmit
patent, May 2004

Connor, Patrick
US Patent Document 6,735,662
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6735662

Mechanism for completing messages in memory
patent, June 2004

Dearth, Glenn A.; Webber, Thomas P.; Ward, Kenneth A.
US Patent Document 6,744,765
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6744765

System and method for efficient data transfer management
patent, June 2004

Dixon, Huey P.; El-Khoury, Roland; Hankins, Steve
US Patent Document 6,754,732
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6754732

Methods, system and article of manufacture for pre-fetching descriptors
patent, February 2005

Webber, Thomas P.
US Patent Document 6,857,030
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6857030

Method and apparatus for discarding data packets through the use of descriptors
patent, December 2005

Achilles, Heather D.; Pearson, Terry; Gallo, Paul S.
US Patent Document 6,977,894
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6977894

Descriptor-based load balancing
patent, December 2005

Oner, Koray; Dion, Jeremy
US Patent Document 6,981,074
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6981074

Apparatus and method for programmable memory access slot assignment
patent, April 2006

Yu, Ching; Zhuang, Xiaohua; Erimli, Bahadir
US Patent Document 7,031,305
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7031305

Apparatus and method for responding to a interruption of a packet flow to a high level data link controller in a signal processing system
patent, May 2006

Iyer, Ramesh; Nguyen, Henry; Smith, Patrick J.
US Patent Document 7,054,958
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7054958

Mechanisms for efficient message passing with copy avoidance in a distributed system using advanced network devices
patent, August 2006

Blackmore, Robert S.; Gildea, Kevin J.; Govindaraju, Rama K.
US Patent Document 7,089,289
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7089289

Buffer management technique for a hypertransport data path protocol
patent, September 2006

Mitten, John W.; Riedle, Christopher G.; Barach, David Richard
US Patent Document 7,111,092
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7111092

Protocol agnostic web listener
patent, October 2006

Firth, Richard L.; Nielsen, Henrik Frystyk; Olson, Lance
US Patent Document 7,120,916
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7120916

Tables with direct memory access descriptor lists for distributed direct memory access
patent, December 2006

Ganapathy, Kumar; Kanapathippillai, Ruban; Shah, Saurin
US Patent Document 7,155,541
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7155541

Chaining direct memory access data transfer operations for compute nodes in a parallel computer
patent, September 2010

Archer, Charles J.; Blocksome, Michael A.
US Patent Document 7,805,546
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7805546

Low latency, high bandwidth data communications between compute nodes in a parallel computer
patent, November 2010

Archer, Charles J.; Blocksome, Michael A.; Ratterman, Joseph D.
US Patent Document 7,827,024
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7827024

Message communications of particular message types between compute nodes using DMA shadow buffers
patent, November 2010

Blocksome, Michael A.; Parker, Jeffrey J.
US Patent Document 7,836,143
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7836143

Direct memory access transfer completion notification
patent, February 2011

Archer, Charles J.; Blocksome, Michael A.; Parker, Jeffrey J.
US Patent Document 7,890,670
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7890670

Systems for distributing data over a computer network and methods for arranging nodes for distribution of data over a computer network
patent, July 2012

O'Neal, Mike; Talton, John P.
US Patent Document 8,219,659
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8219659

DMA controller and method for checking address of data to be transferred with DMA
patent-application, December 2003

Shih, Chien-Yi
US Patent Application 10/443377; 20030233497
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20030233497

Controlling flow of data between data processing systems via a memory
patent-application, March 2004

Biran, Giora; Sostheim, Tal
US Patent Application 10/619988; 20040057380
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20040057380

Efficient implementation of a multidimensional fast fourier transform on a distributed-memory parallel multi-node computer
patent-application, April 2004

Bhanot, Gyan V.; Chen, Dong; Gara, Alan G.
US Patent Application 10/468998; 20040078405
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20040078405

Method and apparatus for implementing packet work area accesses and buffer sharing
patent-application, November 2004

Ganfield, Paul Allen
US Patent Application 10/427864; 20040218631
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20040218631

Direct memory access using memory descriptor list A
patent-application, February 2005

Futral, William T.; Ni, Jie
US Patent Application 10/635306; 20050033874
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050033874

Exponential channelized timer
patent-application, April 2005

Oner, Koray
US Patent Application 10/684916; 20050078669
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050078669

System and method for high performance message passing
patent-application, April 2005

Chen, Weiyi; Dimitrov, Rossen P.; Skjellum, Anthony
US Patent Application 10/953939; 20050091334
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050091334

Method for performing DMA transfers with dynamic descriptor structure
patent-application, May 2005

Lu, Ho-Keng; Chang, Chia-Ming; Lee, Tsai-Pao
US Patent Application 10/720403; 20050114561
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050114561

Lightweight input/output protocol
patent-application, September 2005

Mohamed, Ahmed H.; Voellm, Anthony F.
US Patent Application 10/749959; 20050198113
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050198113

Hardware filtering support for denial-of-service attacks
patent-application, September 2005

Stacy, John Kenneth; Garner, Trevor; Hughes, Martin W.
US Patent Application 10/811195; 20050213570
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050213570

Failover mechanisms in RDMA operations
patent-application, March 2006

Blackmore, Robert S.; Chang, Fu Chung; Chaudhary, Piyush
US Patent Application 11/017574; 20060045005
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060045005

Early interrupt notification in RDMA and in DMA operations
patent-application, March 2006

Blackmore, Robert S.; Helmer, JR., Leonard W.; Heywood, Patricia E.
US Patent Application 11/017573; 20060045109
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060045109

RDMA server (OSI) global TCE tables
patent-application, March 2006

Blackmore, Robert S.; Chaudhary, Piyush; Goscinski, Jason E.
US Patent Application 11/017456; 20060047771
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060047771

Interface internet protocol fragmentation of large broadcast packets in an environment with an unaccommodating maximum transfer unit
patent-application, March 2006

Chang, Fu Chung; Chaudhary, Piyush; Doxtader, Jennifer M.
US Patent Application 10/981097; 20060056405
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060056405

Remote direct memory access system and method
patent-application, April 2006

Gildea, Kevin J.; Govindaraju, Rama K.; Grice, Donald G.
US Patent Application 10/929943; 20060075057
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060075057

Memory-controller-embedded apparatus and procedure for achieving system-directed checkpointing without operating-system kernel support
patent-application, July 2006

Stiffler, Jack J.; Burn, Donald D.
US Patent Application 11/301814; 20060150010
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060150010

Host buffer queues
patent-application, July 2006

Beckett, Jeffrey Scott; Duckman, David James; Nicolson, IV, Alexander
US Patent Application 11/039446; 20060161733
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060161733

Concurrency technique for shared objects
patent-application, July 2006

Martin, Paul A.; Detlefs, David L.; Garthwaite, Alexander T.
US Patent Application 11/384627; 20060161737
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060161737

Data transfer system and data transfer method
patent-application, August 2006

Yoda, Hitoshi; Utsumi, Hiroyuki
US Patent Application 11/168348; 20060190640
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060190640

DMA engine for protocol processing
patent-application, September 2006

Alexander, Thomas; Quattromani, Marc Alan; Rekow, Alexander
US Patent Application 11/373858; 20060206635
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060206635

Method and system for configuring a timer
patent-application, September 2006

Sherwin, JR., Bruce J.
US Patent Application 11/089957; 20060218429
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060218429

Apparatus and method for packet transmission over a high speed network supporting remote direct memory access operations
patent-application, October 2006

Hausauer, Brian S.; Gross, Tristan T.; Keels, Kenneth G.
US Patent Application 11/315685; 20060230119
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060230119

Virtualization for device sharing
patent-application, November 2006

Torudbakken, Ola; Johnsen, Bjorn Dag
US Patent Application 11/291264; 20060253619
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060253619

Third party node initiated remote direct memory access
patent-application, February 2007

Banikazemi, Mohammad; Liu, Jiuxing
US Patent Application 11/099842; 20070041383
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20070041383

Apparatus and method for stateless CRC calculation
patent-application, July 2007

Keels, Kenneth G.; Hausauer, Brian S.; Makhervaks, Vadim G.
US Patent Application 11/357449; 20070165672
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20070165672

Executing an Allgather Operation with an Alltoallv Operation in a Parallel Computer
patent-application, January 2008

Archer, Charles J.; Heidelberger, Philip; Moreira, Jose Eduardo
US Patent Application 11/459387; 20080022079
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080022079

Packet transferring/transmitting method and mobile communication system
patent-application, May 2008

Tomita, Tetsuo; Ikeda, Eiji; Kobayashi, Kazunari
US Patent Application 12/003283; 20080101295
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080101295

RDMA systems and methods for sending commands from a source node to a target node for local execution of commands at the target node
patent-application, May 2008

Leonard, Judson S.; Stewart, Lawrence C.; Gingold, David
US Patent Application 11/594443; 20080109573
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080109573

Data Flow Control Within and Between DMA Channels
patent-application, September 2008

Go, Dominic; Hayter, Mark D.; Kumar, Puneet
US Patent Application 11/682051; 20080222317
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080222317

Signaling Completion of a Message Transfer from an Origin Compute Node to a Target Compute Node
patent-application, November 2008

Blocksome, Michael A.; Parker, Jeffrey J.
US Patent Application 11/744319; 20080273543
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080273543

Ultrascalable Petaflop Parallel Supercomputer
patent-application, January 2009

Blumrich, Matthias A.; Chen, Dong; Chiu, George
US Patent Document 11/768905; 20090006808
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090006808

Low Latency, High Bandwidth Data Communications Between Compute Nodes in a Parallel Computer
patent-application, January 2009

Blocksome, Michael A.
US Patent Application 11/776718; 20090019190
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090019190

Repeating Direct Memory Access Data Transfer Operations for Compute Nodes in a Parallel Computer
patent-application, January 2009

Archer, Charles J.; Blocksome, Michael A.
US Patent Application 11/829334; 20090031001
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090031001