Optimized collectives using a DMA on a parallel computer

Chen, Dong; Gabor, Dozsa; Giampapa, Mark E.; Heidelberger, Phillip

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Title: Optimized collectives using a DMA on a parallel computer

Abstract

Optimizing collective operations using direct memory access controller on a parallel computer, in one aspect, may comprise establishing a byte counter associated with a direct memory access controller for each submessage in a message. The byte counter includes at least a base address of memory and a byte count associated with a submessage. A byte counter associated with a submessage is monitored to determine whether at least a block of data of the submessage has been received. The block of data has a predetermined size, for example, a number of bytes. The block is processed when the block has been fully received, for example, when the byte count indicates all bytes of the block have been received. The monitoring and processing may continue for all blocks in all submessages in the message.

Inventors:

Chen, Dong ^[1]; Gabor, Dozsa ^[2]; Giampapa, Mark E. ^[3]; Heidelberger, Phillip ^[4]

Croton On Hudson, NY
Ardsley, NY
Irvington, NY
Cortlandt Manor, NY

Issue Date:: 2011-02-08

Research Org.:: International Business Machines Corp., Armonk, NY (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1018039

Patent Number(s):: 7886084

Application Number:: 11/768,645

Assignee:: International Business Machines Corporation (Armonk, NY)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F13/28 - using burst mode transfer, e.g. direct memory access {DMA}, cycle steal

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DOE Contract Number:: B554331

Resource Type:: Patent

Resource Relation:: Patent File Date: 2007 Jun 26

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

Citation Formats


                    Chen, Dong, Gabor, Dozsa, Giampapa, Mark E., and Heidelberger, Phillip. Optimized collectives using a DMA on a parallel computer.  United States: N. p., 2011. 
        Web.

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                    Chen, Dong, Gabor, Dozsa, Giampapa, Mark E., & Heidelberger, Phillip. Optimized collectives using a DMA on a parallel computer.  United States.

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                    Chen, Dong, Gabor, Dozsa, Giampapa, Mark E., and Heidelberger, Phillip. Tue .  
        "Optimized collectives using a DMA on a parallel computer".  United States.  https://www.osti.gov/servlets/purl/1018039.

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@article{osti_1018039,

  title        = {Optimized collectives using a DMA on a parallel computer},

  author       = {Chen, Dong and Gabor, Dozsa and Giampapa, Mark E. and Heidelberger, Phillip},

  abstractNote = {Optimizing collective operations using direct memory access controller on a parallel computer, in one aspect, may comprise establishing a byte counter associated with a direct memory access controller for each submessage in a message. The byte counter includes at least a base address of memory and a byte count associated with a submessage. A byte counter associated with a submessage is monitored to determine whether at least a block of data of the submessage has been received. The block of data has a predetermined size, for example, a number of bytes. The block is processed when the block has been fully received, for example, when the byte count indicates all bytes of the block have been received. The monitoring and processing may continue for all blocks in all submessages in the message.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2011},

  month        = {2}

}

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Works referenced in this record:

Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures
journal, August 2005

Pande, P. P.; Grecu, C.; Jones, M.
IEEE Transactions on Computers, Vol. 54, Issue 8
https://doi.org/10.1109/TC.2005.134

Performance evaluation of adaptive MPI
conference, January 2006

Huang, Chao; Zheng, Gengbin; Kalé, Laxmikant
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming - PPoPP '06
https://doi.org/10.1145/1122971.1122976

Directory-based cache coherence in large-scale multiprocessors
journal, June 1990

Chaiken, D.; Fields, C.; Kurihara, K.
Computer, Vol. 23, Issue 6
https://doi.org/10.1109/2.55500

Blue Gene/L torus interconnection network
journal, March 2005

Adiga, N. R.; Blumrich, M. A.; Chen, D.
IBM Journal of Research and Development, Vol. 49, Issue 2.3
https://doi.org/10.1147/rd.492.0265

Synchronization, coherence, and event ordering in multiprocessors
journal, February 1988

Dubois, M.; Scheurich, C.; Briggs, F. A.
Computer, Vol. 21, Issue 2
https://doi.org/10.1109/2.15

Overview of the Blue Gene/L system architecture
journal, March 2005

Gara, A.; Blumrich, M. A.; Chen, D.
IBM Journal of Research and Development, Vol. 49, Issue 2.3
https://doi.org/10.1147/rd.492.0195

Optimization of MPI collective communication on BlueGene/L systems
conference, January 2005

Almási, George; Heidelberger, Philip; Archer, Charles J.
Proceedings of the 19th annual international conference on Supercomputing - ICS '05
https://doi.org/10.1145/1088149.1088183

Intel 870: a building block for cost-effective, scalable servers
journal, March 2002

Briggs, F.; Cekleov, M.; Creta, K.
IEEE Micro, Vol. 22, Issue 2
https://doi.org/10.1109/MM.2002.997878

Blue Gene/L advanced diagnostics environment
journal, March 2005

Giampapa, M. E.; Bellofatto, R.; Blumrich, M. A.
IBM Journal of Research and Development, Vol. 49, Issue 2.3
https://doi.org/10.1147/rd.492.0319

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Similar Records

Title: Optimized collectives using a DMA on a parallel computer

Abstract

Citation Formats

Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures journal, August 2005

Performance evaluation of adaptive MPI conference, January 2006

Directory-based cache coherence in large-scale multiprocessors journal, June 1990

Blue Gene/L torus interconnection network journal, March 2005

Synchronization, coherence, and event ordering in multiprocessors journal, February 1988

Overview of the Blue Gene/L system architecture journal, March 2005

Optimization of MPI collective communication on BlueGene/L systems conference, January 2005

Intel 870: a building block for cost-effective, scalable servers journal, March 2002

Blue Gene/L advanced diagnostics environment journal, March 2005

Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures
journal, August 2005

Performance evaluation of adaptive MPI
conference, January 2006

Directory-based cache coherence in large-scale multiprocessors
journal, June 1990

Blue Gene/L torus interconnection network
journal, March 2005

Synchronization, coherence, and event ordering in multiprocessors
journal, February 1988

Overview of the Blue Gene/L system architecture
journal, March 2005

Optimization of MPI collective communication on BlueGene/L systems
conference, January 2005

Intel 870: a building block for cost-effective, scalable servers
journal, March 2002

Blue Gene/L advanced diagnostics environment
journal, March 2005