Title: Regrowth method for fabricating wide-bandgap transistors, and devices made thereby

Abstract

Methods are provided for fabricating a HEMT (high-electron-mobility transistor) that involve sequential epitaxial growth of III-nitride channel and barrier layers, followed by epitaxial regrowth of further III-nitride material through a window in a mask layer. In examples, the regrowth takes place over exposed portions of the channel layer in the source and drain regions of the device, and the regrown material has a composition different from the barrier layer. In other examples, the regrowth takes place on the barrier layer, only in the access region or regions. Devices made according to the disclosed methods are also provided.

Inventors:

Armstrong, Andrew; Baca, Albert G.; Allerman, Andrew A.; Sanchez, Carlos Anthony; Douglas, Erica Ann; Kaplar, Robert

Issue Date:

Tue Aug 20 00:00:00 EDT 2019

Research Org.:

Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

Sponsoring Org.:

USDOE

OSTI Identifier:

1568755

Patent Number(s):

10388753

Application Number:

15/921,007

Assignee:

National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)

Patent Classifications (CPCs):

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

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H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

H01L21/0254 - {Nitrides}
H01L21/0262 - {Reduction or decomposition of gaseous compounds, e.g. CVD}
H01L21/02639 - {Preparation of substrate for selective deposition}
H01L21/02642 - {Mask materials other than SiO2 or SiN}
H01L21/18 - the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials {
H01L21/182 - {Intermixing or interdiffusion or disordering of III-V heterostructures, e.g. IILD}
H01L21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth {solid phase epitaxy}
H01L21/30621 - {Vapour phase etching}
H01L21/31111 - {by chemical means}
H01L21/743 - {Making of internal connections, substrate contacts}
H01L21/746 - {for AIII-BV integrated circuits}
H01L29/0843 - {Source or drain regions of field-effect devices}
H01L29/2003 - {Nitride compounds}
H01L29/201 - including two or more compounds {, e.g. alloys
H01L29/41758 - {for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
H01L29/42316 - {for field-effect transistors}
H01L29/66431 - {with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
H01L29/66462 - {with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT}
H01L29/778 - with two-dimensional charge carrier gas channel, e.g. HEMT {
H01L29/7781 - {with inverted single heterostructure, i.e. with active layer formed on top of wide bandgap layer, e.g. IHEMT}
H01L29/7782 - {with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET}
H01L29/7786 - {with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT}

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DOE Contract Number:  

NA0003525

Resource Type:

Patent

Resource Relation:

Patent File Date: 03/14/2018

Country of Publication:

United States

Language:

English