Method to fabricate quantum dot field-effect transistors without bias-stress effect
Abstract
Disclosed herein are embodiments of a method to form quantum dot field-effect transistors (QD FETs) having little to no bias-stress effect. Bias-stress effect can be reduced or eliminated through, as an example, the use of a gas or liquid to remove ligands and/or reduce charge trapping on the QD FETs, followed by deposition of an inorganic or organic matrix around the QDs in the FET.
- Inventors:
- Issue Date:
- Research Org.:
- Univ. of California, Oakland, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1525017
- Patent Number(s):
- 10224422
- Application Number:
- 14/973,522
- Assignee:
- The Regents of the University of California (Oakland, CA)
- Patent Classifications (CPCs):
-
B - PERFORMING OPERATIONS B82 - NANOTECHNOLOGY B82Y - SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
- DOE Contract Number:
- SC0003904
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2015-12-17
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 77 NANOSCIENCE AND NANOTECHNOLOGY; 36 MATERIALS SCIENCE
Citation Formats
Law, Matt, and Tolentino, Jason. Method to fabricate quantum dot field-effect transistors without bias-stress effect. United States: N. p., 2019.
Web.
Law, Matt, & Tolentino, Jason. Method to fabricate quantum dot field-effect transistors without bias-stress effect. United States.
Law, Matt, and Tolentino, Jason. Tue .
"Method to fabricate quantum dot field-effect transistors without bias-stress effect". United States. https://www.osti.gov/servlets/purl/1525017.
@article{osti_1525017,
title = {Method to fabricate quantum dot field-effect transistors without bias-stress effect},
author = {Law, Matt and Tolentino, Jason},
abstractNote = {Disclosed herein are embodiments of a method to form quantum dot field-effect transistors (QD FETs) having little to no bias-stress effect. Bias-stress effect can be reduced or eliminated through, as an example, the use of a gas or liquid to remove ligands and/or reduce charge trapping on the QD FETs, followed by deposition of an inorganic or organic matrix around the QDs in the FET.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Mar 05 00:00:00 EST 2019},
month = {Tue Mar 05 00:00:00 EST 2019}
}
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Works referenced in this record:
Luminescent efficiency of semiconductor nanocrystals by surface treatment
patent, October 2007
- Jang, Eun Joo; Jun, Shin Ae; Seong, Hyang Sook
- US Patent Document 7,288,468