Triple inverter pierce oscillator circuit suitable for CMOS
- Albuquerque, NM
An oscillator circuit is disclosed which can be formed using discrete field-effect transistors (FETs), or as a complementary metal-oxide-semiconductor (CMOS) integrated circuit. The oscillator circuit utilizes a Pierce oscillator design with three inverter stages connected in series. A feedback resistor provided in a feedback loop about a second inverter stage provides an almost ideal inverting transconductance thereby allowing high-Q operation at the resonator-controlled frequency while suppressing a parasitic oscillation frequency that is inherent in a Pierce configuration using a "standard" triple inverter for the sustaining amplifier. The oscillator circuit, which operates in a range of 10 50 MHz, has applications for use as a clock in a microprocessor and can also be used for sensor applications.
- Research Organization:
- Sandia National Laboratories (SNL-NM), Albuquerque, NM
- Sponsoring Organization:
- United States Department of Energy
- DOE Contract Number:
- AC04-94AL85000
- Assignee:
- Sandia Corporation (Albuquerque, NM)
- Patent Number(s):
- 7,183,868
- Application Number:
- 10/937,163
- OSTI ID:
- 902643
- Country of Publication:
- United States
- Language:
- English
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