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Electrochemical method for defect delineation in silicon-on-insulator wafers

Patent ·
OSTI ID:867810
 [1];  [1];  [1];  [1];  [1];  [1]
  1. Albuquerque, NM
+ Show Author Affiliations
An electrochemical method for defect delineation in thin-film SOI or SOS wafers in which a surface of a silicon wafer is electrically connected so as to control the voltage of the surface within a specified range, the silicon wafer is then contacted with an electrolyte, and, after removing the electrolyte, defects and metal contamination in the silicon wafer are identified.
Research Organization:
AT & T CORP
DOE Contract Number:
AC04-76DP00789
Assignee:
United States Department of Energy (Washington, DC)
Patent Number(s):
US 5015346
OSTI ID:
867810
Country of Publication:
United States
Language:
English

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Related Subjects

/205/
chemical method
connected
contacted
contamination
control
defect
defect delineation
defects
delineation
electrically
electrically connected
electrochemical
electrochemical method
electrolyte
identified
metal
metal contamination
method
range
removing
silicon
silicon wafer
silicon-on-insulator
soi
sos
specified
specified range
surface
thin-film
voltage
wafer
wafers