Electrochemical method for defect delineation in silicon-on-insulator wafers
Patent
·
OSTI ID:867810
- Albuquerque, NM
An electrochemical method for defect delineation in thin-film SOI or SOS wafers in which a surface of a silicon wafer is electrically connected so as to control the voltage of the surface within a specified range, the silicon wafer is then contacted with an electrolyte, and, after removing the electrolyte, defects and metal contamination in the silicon wafer are identified.
- Research Organization:
- AT&T
- DOE Contract Number:
- AC04-76DP00789
- Assignee:
- United States Department of Energy (Washington, DC)
- Patent Number(s):
- US 5015346
- OSTI ID:
- 867810
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
electrochemical
method
defect
delineation
silicon-on-insulator
wafers
thin-film
soi
sos
surface
silicon
wafer
electrically
connected
control
voltage
specified
range
contacted
electrolyte
removing
defects
metal
contamination
identified
metal contamination
electrically connected
silicon wafer
electrochemical method
specified range
chemical method
defect delineation
/205/
method
defect
delineation
silicon-on-insulator
wafers
thin-film
soi
sos
surface
silicon
wafer
electrically
connected
control
voltage
specified
range
contacted
electrolyte
removing
defects
metal
contamination
identified
metal contamination
electrically connected
silicon wafer
electrochemical method
specified range
chemical method
defect delineation
/205/