Electrochemical method for defect delineation in silicon-on-insulator wafers

Patent · Tue May 14 00:00:00 EDT 1991

OSTI ID:5874809

Guilinger, T R; Jones, H D.T.; Kelly, M J; Medernach, J W; Stevenson, J O; Tsao, S S

This patent describes an electrochemical method for defect delineation in thin-film SOI or SOS wafers in which a surface of a silicon wafer is electrically connected so as to control the voltage of the surface within a specified range, the silicon wafer is then contacted with an electrolyte, and, after removing the electrolyte, defects and metal contamination in the silicon wafer are identified.

• Assignee: US DOE, Washington, DC (USA)
• Patent Number(s): A; US 5015346
• Application Number: PPN: US 7-506734
• OSTI ID: 5874809
• Country of Publication: United States
• Language: English

Related Subjects

36 MATERIALS SCIENCE
360602* -- Other Materials-- Structure & Phase Studies
37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CHEMISTRY
400400 -- Electrochemistry
CARRIER LIFETIME
CHEMISTRY
CONTROL
CORUNDUM
CRYSTAL DEFECTS
CRYSTAL STRUCTURE
CURRENTS
ELECTRIC CONTACTS
ELECTRIC CURRENTS
ELECTRICAL EQUIPMENT
ELECTROCHEMISTRY
ELECTROLYTES
ELECTRONIC CIRCUITS
ELEMENTS
EQUIPMENT
FABRICATION
FILMS
IMPURITIES
INTEGRATED CIRCUITS
LEAKAGE CURRENT
LIFETIME
MEASURING METHODS
MICROELECTRONIC CIRCUITS
MINERALS
OXIDE MINERALS
POINT DEFECTS
PROCESS CONTROL
SAPPHIRE
SEMIMETALS
SILICON
STACKING FAULTS
THIN FILMS
VOLTAGE REGULATORS