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Self aligned radiation hard CMOS/SOS

Conference · · IEEE Trans. Nucl. Sci.; (United States)
OSTI ID:7307229
This paper reports the results of extending previously reported radiation hardening methods to a self-aligned CMOS/SOS process. Over 20 lots of CMOS/SOS circuits have been fabricated with this process. Threshold shifts, after 1 Mrad (Si) Co/sup 60/ irradiation and less than or equal to 1.2V for the n-channel devices and less than or equal to 2.7V for the p-channel devices under worst case bias conditions. Several lots of devices have been fabricated with less than or equal to 0.7V n-channel shifts and less than or equal to 1.2V p-channel shifts under the above radiation and bias conditions. Post-irradiation n-channel back leakage is in the range of .05 to 5 ..mu..A per mil of channel width, the specific value dependent to a considerable extent on quality of the starting SOS material. Electrical parameters and life-test stability are excellent and equal to those obtained with similar, non-radiation-hard processes.
Research Organization:
Rockwell International Corp., Anaheim, CA
OSTI ID:
7307229
Conference Information:
Journal Name: IEEE Trans. Nucl. Sci.; (United States) Journal Volume: NS-23:6
Country of Publication:
United States
Language:
English

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