Parallel pipelined processor
Patent
·
OSTI ID:7222550
This patent describes a computer system comprising at least two processors. Each includes: arithmetic logic unit means for receiving input information signal elements and providing output information signal elements, a first-in first-out register stack means; a program control unit; and means connecting the respective output data lines of the first-in first-out register stacks in parallel whereby, during predetermined cycles of operations of the computer system output, information signal elements from no more than one first-in first-out output register stack are provided by the parallel connected output data lines.
- Assignee:
- International Business Machines Corp., Armonk, NY
- Patent Number(s):
- US 4876644
- Application Number:
- PPN: US 7331021A
- OSTI ID:
- 7222550
- Country of Publication:
- United States
- Language:
- English
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