Reconfigurable fully parallel associative processor

Thesis/Dissertation · Thu Jan 01 04:00:00 EST 1987

OSTI ID:7169612

Ilgen, S

This dissertation describes a new associative processing system using novel VLSI associative memory. The on-chip intelligence of the memory removes the restrictions that are generally ascribed to classical associative-memory systems. Using the chip as a basic building block, a dynamically reconfigurable associative processor is proposed. A novel shifter interconnection network provides fast communication with the host, as well as the interchip communication required to emulate different networks with a constant routing time for processor data transfers. Parallel arithmetic algorithms are given, together with the application of the Associative Processor to image processing. Results are summarized to show the power of the proposed associative machine which proves itself to be a general-purpose parallel processor with a broad range of applications.

• Research Organization: California Univ., Santa Barbara (USA)
• OSTI ID: 7169612
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ALGORITHMS
DATA PROCESSING
DISTRIBUTED DATA PROCESSING
ELECTRONIC CIRCUITS
IMAGE PROCESSING
INTEGRATED CIRCUITS
MATHEMATICAL LOGIC
MEMORY MANAGEMENT
MICROELECTRONIC CIRCUITS
PARALLEL PROCESSING
PROCESSING
PROGRAMMING