Utilization of processors interconnected with a reconfigurable network
This dissertation addresses the problem of generating parallel-processor interconnection topologies that are optimized with respect to the communication patterns of a parallel-task graph. First described is a class of interconnection networks called r-reconfigurable networks. This class of networks can be configured into any topology in which the number of communication links connected to a processor is less than or equal to some constant r. Several ways of implementing r-reconfigurable networks are presented. Each implementation is characterized by a relatively slow reconfiguration time. Thus, the network topology is fixed before task execution and remains fixed throughout execution. Given a r-reconfigurable network, the problem is that of synthesizing a network topology that matches the communication requirements of a parallel program. This dissertation shows that this problem is NP-complete. Therefore, heuristic algorithms are developed and used to generate suboptimum topologies. These topologies are analyzed with respect to a lower bound on optimum interconnection topologies to determine the best, worst, and average case behavior.
- Research Organization:
- Pennsylvania Univ., Philadelphia (USA)
- OSTI ID:
- 6963911
- Country of Publication:
- United States
- Language:
- English
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