Synthesizing minimum total expansion topologies reconfigurable interconnection networks

Journal Article · Tue Aug 01 00:00:00 EDT 1989 · Journal of Parallel and Distributed Computing; (USA)

DOI:https://doi.org/10.1016/0743-7315(89)90057-9· OSTI ID:5242848

Smitley, D ^[1]; Lee, I ^[2]

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1. Supercomputing Research Center, 4380 Forbes Blvd., Lanham, MD (US)
2. Pennsylvania Univ., Philadelphia, PA (USA)

The performance of a parallel algorithm depends on how well the interconnection topology of the target parallel system matches the communication patterns of the algorithm. The authors describe how to generate a topology for a network that can be configured into any r-regular topology. The topology generated has small total expansion with respect to a given task graph. The expansion of an edge in a task graph is the length of the shortest path that the edge maps to in the processor graph. The algorithm used to generate the topologies is analyzed and its average case behavior is determined.

• OSTI ID: 5242848
• Journal Information: Journal of Parallel and Distributed Computing; (USA), Journal Name: Journal of Parallel and Distributed Computing; (USA) Vol. 7:1; ISSN JPDCE; ISSN 0743-7315
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990200* -- Mathematics & Computers
ALGORITHMS
ARRAY PROCESSORS
COMMUNICATIONS
COMPUTER NETWORKS
DATA ANALYSIS
GRAPHS
MATHEMATICAL LOGIC
MATHEMATICS
PARALLEL PROCESSING
PERFORMANCE
PROGRAMMING
TOPOLOGY