The scalable coherent interface, IEEE P1596, status and possible applications to data acquisition and physics
Conference
·
OSTI ID:7070485
IEEE P1596, the Scalable Coherent Interface (formerly known as SuperBus) is based on experience gained while developing Fastbus (ANSI/IEEE 960-1986, IEC 935), Futurebus (IEEE P896.x) and other modern 32-bit buses. SCI goals include a minimum bandwidth of 1 GByte/sec per processor in multiprocessor systems with thousands of processors; efficient support of a coherent distributed-cache image of distributed shared memory; support for repeaters which interface to existing or future buses; and support for inexpensive small rings as well as for general switched interconnections like Banyan, Omega, or crossbar networks. This paper presents a summary of current directions, reports the status of the work in progress, and suggests some applications in data acquisition and physics. 7 refs.
- Research Organization:
- Stanford Linear Accelerator Center, Menlo Park, CA (USA)
- Sponsoring Organization:
- DOE/ER
- DOE Contract Number:
- AC03-76SF00515
- OSTI ID:
- 7070485
- Report Number(s):
- SLAC-PUB-5119; CONF-900143--26; ON: DE90006454
- Country of Publication:
- United States
- Language:
- English
Similar Records
The scalable coherent interface, IEEE P1596; Status and possible applications to data acquisition and physics
Applications for the scalable coherent interface
Applications for the scalable coherent interface
Conference
·
Sat Mar 31 23:00:00 EST 1990
· IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (USA)
·
OSTI ID:6606351
Applications for the scalable coherent interface
Conference
·
Wed Aug 01 00:00:00 EDT 1990
· AIP Conference Proceedings (American Institute of Physics); (USA)
·
OSTI ID:5954095
Applications for the scalable coherent interface
Conference
·
Sat Mar 31 23:00:00 EST 1990
·
OSTI ID:7184232
Related Subjects
43 PARTICLE ACCELERATORS
430303* -- Particle Accelerators-- Experimental Facilities & Equipment
99 GENERAL AND MISCELLANEOUS
990200 -- Mathematics & Computers
ARRAY PROCESSORS
COMPUTER ARCHITECTURE
COMPUTERS
DATA ACQUISITION SYSTEMS
DIGITAL COMPUTERS
EQUIPMENT INTERFACES
FASTBUS SYSTEM
MEMORY MANAGEMENT
SUPERCOMPUTERS
430303* -- Particle Accelerators-- Experimental Facilities & Equipment
99 GENERAL AND MISCELLANEOUS
990200 -- Mathematics & Computers
ARRAY PROCESSORS
COMPUTER ARCHITECTURE
COMPUTERS
DATA ACQUISITION SYSTEMS
DIGITAL COMPUTERS
EQUIPMENT INTERFACES
FASTBUS SYSTEM
MEMORY MANAGEMENT
SUPERCOMPUTERS