Parallel processing system apparatus
Patent
·
OSTI ID:6600983
This patent describes a processing element for use in a single instruction multiple data parallel processing system comprising a processing element. The element consists of: an arithmetic/logic unit (ALU) comprising electronic circuitry for performing binary logic operations on signals applied thereto; an exclusive-OR gate coupled to receive a first input signal and apply an output signal to the ALU; memory means for storing a signal, the signal stored in the memory means being outputted to the gate; and the gate providing the output signal to the ALU as the complement of the first input signal only upon a second being stored in the memory means and thereby outputted to the gate, the gate providing the output signal to the ALU as the first input signal in the absence of the second signal.
- Assignee:
- General Electric Co., Schenectady, NY
- Patent Number(s):
- US 4775952
- OSTI ID:
- 6600983
- Country of Publication:
- United States
- Language:
- English
Similar Records
Cellular array processor with individual cell-level data-dependent cell control and multiport input memory
Parallel digital processor
Apparatus and method for synchronization of a coprocessor unit in a pipelined central processing unit
Patent
·
Mon Mar 05 23:00:00 EST 1990
·
OSTI ID:6895782
Parallel digital processor
Patent
·
Mon Feb 12 23:00:00 EST 1990
·
OSTI ID:6893710
Apparatus and method for synchronization of a coprocessor unit in a pipelined central processing unit
Patent
·
Tue Jul 24 00:00:00 EDT 1990
·
OSTI ID:6473540