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Selectively dry-etched n sup + -GaAs/N-InAlAs/InGaAs HEMT's for LSI

Journal Article · · IEEE Electron Device Letters (Institute of Electrical and Electronics Engineers); (USA)
DOI:https://doi.org/10.1109/55.55259· OSTI ID:6584590
; ; ;  [1];  [2]
  1. Lab. Ltd., 10-1 Morinosato-Wakamiya, Atsugi 242-01 Fujitsu (JP)
  2. California Univ., Santa Barbara, CA (USA)

High-speed N-InAlAs/InGaAs HEMT large-scale integrated circuits must have uniform device parameters. The authors demonstrate a new selectively dry-etched n{sup +}-GaAs/N-InAlAs/InGaAs HEMT which has a very uniform threshold voltage. Despite the high dislocation density at the n{sup +}-GaAs layer, its performance is excellent. For a gate length of 0.92 {mu}m, the maximum transconductance of the HEMT is 390 mS/mm. The measured current-gain cutoff frequency {ital f{sub t}} is 23.7 GHz, and the maximum frequency of oscillation {ital f}{sub max} is 75.0 GHz. The standard deviation of the threshold voltage across a 2-in wafer is as low as 13 mV.

OSTI ID:
6584590
Journal Information:
IEEE Electron Device Letters (Institute of Electrical and Electronics Engineers); (USA), Journal Name: IEEE Electron Device Letters (Institute of Electrical and Electronics Engineers); (USA) Vol. 11:5; ISSN EDLED; ISSN 0741-3106
Country of Publication:
United States
Language:
English