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U.S. Department of Energy
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Ultra-low power microwave CHFET integrated circuit development

Technical Report ·
DOI:https://doi.org/10.2172/654155· OSTI ID:654155

This report summarizes work on the development of ultra-low power microwave CHFET integrated circuit development. Power consumption of microwave circuits has been reduced by factors of 50--1,000 over commercially available circuits. Positive threshold field effect transistors (nJFETs and PHEMTs) have been used to design and fabricate microwave circuits with power levels of 1 milliwatt or less. 0.7 {micro}m gate nJFETs are suitable for both digital CHFET integrated circuits as well as low power microwave circuits. Both hybrid amplifiers and MMICs were demonstrated at the 1 mW level at 2.4 GHz. Advanced devices were also developed and characterized for even lower power levels. Amplifiers with 0.3 {micro}m JFETs were simulated with 8--10 dB gain down to power levels of 250 microwatts ({mu}W). However 0.25 {micro}m PHEMTs proved superior to the JFETs with amplifier gain of 8 dB at 217 MHz and 50 {mu}W power levels but they are not integrable with the digital CHFET technology.

Research Organization:
Sandia National Labs., Albuquerque, NM (United States)
Sponsoring Organization:
USDOE Office of Financial Management and Controller, Washington, DC (United States)
DOE Contract Number:
AC04-94AL85000
OSTI ID:
654155
Report Number(s):
SAND--98-0765; ON: DE98004795; BR: YN0100000
Country of Publication:
United States
Language:
English