Microbeam mapping of single event latchups and single event upsets in CMOS SRAMs
- Soreq NRC, Yahvne (Israel)
- GSI, Darmstadt (Germany)
- Fraunhofer Inst. fuer Naturwissenschaftlich Technische Trendanalysen, Euskirchen (Germany)
The first simultaneous microbeam mapping of single event upset (SEU) and latchup (SEL) in the CMOS RAM HM65162 is presented. The authors found that the shapes of the sensitive areas depend on V{sub DD}, on the ions being used and on the site on the chip being hit by the ion. In particular, they found SEL sensitive sites close to the main power supply lines between the memory-bit-arrays by detecting the accompanying current surge. All these SELs were also accompanied by bit-flips elsewhere in the memory (which they call indirect SEUs in contrast to the well known SEUs induced in the hit memory cell only). When identical SEL sensitive sites were hit farther away from the supply lines only indirect SEL sensitive sites could be detected. They interpret these events as latent latchups in contrast to the classical ones detected by their induced current surge. These latent SELs were probably decoupled from the main supply lines by the high resistivity of the local supply lines.
- OSTI ID:
- 644166
- Report Number(s):
- CONF-970934-; ISSN 0018-9499; TRN: 98:008099
- Journal Information:
- IEEE Transactions on Nuclear Science, Vol. 45, Issue 3Pt3; Conference: RADECS 97: radiations and their effects on devices and systems conference, Cannes (France), 15-19 Sep 1997; Other Information: PBD: Jun 1998
- Country of Publication:
- United States
- Language:
- English
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