Latent interface-trap generation in commercial power VDMOSFETs
- Faculty of Electronic Engineering, Nis (Yugoslavia)
Latent interface-trap generation is one of the most controversial post-irradiation effects in MOSFETs, which can have a significant impact on device performance and reliability in radiation environments. In this paper, the authors present new experimental evidence of latent interface-trap buildup in commercial power VDMOSFETs: its dependencies on dose, temperature and gate bias applied during irradiation and annealing. They discuss several models for latent interface-trap buildup and show that the most consistent is one which involves the diffusion of molecular hydrogen from structures adjacent to the gate oxide (CVD oxide, poly-Si gate), and its cracking on positive charge centers in the oxide. The cracking reaction liberates hydrogen ions, which drift to the Si/SiO{sub 2} interface to form interface traps. Some hypothesis from the recently proposed H-W model for post-irradiation behavior of interface traps may help resolve the question of the source of hydrogen sufficient to cause up to 800% increase in interface-trap density, experimentally observed. The implications of latent interface-trap generation for hardness assurance test methods are also discussed.
- OSTI ID:
- 644130
- Report Number(s):
- CONF-970934--
- Journal Information:
- IEEE Transactions on Nuclear Science, Journal Name: IEEE Transactions on Nuclear Science Journal Issue: 3Pt3 Vol. 45; ISSN IETNAE; ISSN 0018-9499
- Country of Publication:
- United States
- Language:
- English
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