Programmable array logic cell

Patent · Tue Dec 06 04:00:00 EST 1988

OSTI ID:6337979

Birkner, J M; Tavana, D M; Chan, A K; Wong, S Y

This patent describes a programmable logic cell comprising: a plurality of logical AND gates, each gate having input terminals and an output line; cell input lines, selectively connectable to the input terminals of selected AND gates; a single logic OR gate having input terminals connected to selected AND gate output lines, and having an output line; a logical XOR gate having a first input terminal connected to the OR gate output line, having a second input terminal connected to an AND gate output line, and having an XOR output line on which the XOR gate provides a state signal; memory means to store the XOR output state signal; a cell output line coupled to the OR gate output line for providing a cell output signal; and feedback means selectively connectable to apply the state signal to selected AND gate input terminals.

• Assignee: Advanced Micro Devices, Inc., Sunnyvale, CA
• Patent Number(s): US 4789951
• OSTI ID: 6337979
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
420800 -- Engineering-- Electronic Circuits & Devices-- (-1989)
99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ARRAY PROCESSORS
COMPUTER ARCHITECTURE
COMPUTERS
DIGITAL COMPUTERS
ELECTRIC CONTACTS
ELECTRICAL EQUIPMENT
ELECTRONIC CIRCUITS
EQUIPMENT
FEEDBACK
GATING CIRCUITS
LOGIC CIRCUITS
MEMORY DEVICES
PULSE CIRCUITS
SIGNAL CONDITIONERS
SUPERCOMPUTERS