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U.S. Department of Energy
Office of Scientific and Technical Information

Radiation-tolerant high-voltage CMOS/MNOS technology

Conference ·

A radiation-tolerant metal-gate CMOS technology has been developed for use on non-volatile MNOS integrated circuit chips. These CMOS peripherals are capable of the high voltage operation (> 25 V) required to drive the memory array and require only the standard seven mask levels, including passivation. One additional mask is required to define the MNOS memory array. Fabrication and characterization of these circuits are described. Processing sequences compatible with known radiation-hardening procedures are defined.

Research Organization:
Sandia Labs., Albuquerque, NM (USA)
DOE Contract Number:
EY-76-C-04-0789
OSTI ID:
6266358
Report Number(s):
SAND-78-1523C; CONF-781210-4
Country of Publication:
United States
Language:
English