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CMOS shift register circuits for radiation-tolerant VLSI's

Journal Article · · IEEE Trans. Nucl. Sci.; (United States)
A radiation-tolerant VLSI circuits investigation has been carried out using CMOS/SOS shift registers. Static and dynamic circuit performance degradation is discussed, based on MOS FET parameter shifts due to radiation effects, utilizing ..gamma..-ray irradiation and SPICE simulation. Functionality, after radiation doses in excess of 10/sup 5/ rad (Si), is shown for circuits fabricated by radiation-hardened process. Radiation-tolerance superiority of clocked gate CMOS (C/sup 2/MOS) shift register circuits to transfer gate shift register circuits is discussed, placing emphasis mainly on radiation-bias effects. Based on the above results, the C/sup 2/MOS is proposed for use in radiation-tolerant SOS VLSI circuits.
Research Organization:
Semiconductor Device Engineering Laboratory, Toshiba Corporation, 1 Komukai-Toshibacho, Saiwai-ku, Kawasaki 210
OSTI ID:
6031631
Journal Information:
IEEE Trans. Nucl. Sci.; (United States), Journal Name: IEEE Trans. Nucl. Sci.; (United States) Vol. NS-31:5; ISSN IETNA
Country of Publication:
United States
Language:
English