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Radiation-tolerant 50MHz bulk CMOS VLSI circuits utilizing radiation-hard structure NMOS transistors

Journal Article · · IEEE Trans. Nucl. Sci.; (United States)

A radiation-tolerant, high speed, bulk CMOS VLSI circuit design, utilizing a new NMOS structure, has been investigated, based on ..gamma..-ray irradiation experimental results for 2 ..mu..m shift registers. By utilizing 60-bit clocked gate and transfer gate static shift register circuits, the usefulness of radiation-hard NMOS structure and circuit design parameter optimization has been confirmed experimentally, showing 50 MHZ operation CMOS circuits at 5 V supply voltage after 1 x 10/sup 5/ rads (Si) irradiation. The limitations of dynamic circuits in radiation-tolerant circuit designs have also been shown, using 120-bit dynamic shift register circuits. Based on the above results, radiation-tolerant, high-performance, bulk CMOS VLSI circuit designs are discussed.

Research Organization:
Semiconductor Device Engineering Lab., Research and Development Center, Toshiba Corp., 1, Komukai-Toshiba-cho, Saiwai-ku, Kawasaki 210
OSTI ID:
5011956
Journal Information:
IEEE Trans. Nucl. Sci.; (United States), Journal Name: IEEE Trans. Nucl. Sci.; (United States) Vol. NS-33:5; ISSN IETNA
Country of Publication:
United States
Language:
English