Interprocessor communication
A multiprocessor system is described comprising: a plurality of separate processor modules, each being capable of conducting data processing operations; bus means coupling processor modules to one another for enabling communication therebetween; request means included in the sender processor module for generating a send request on the bus means when the sender processor module is ready to transmit; polling means included in the bus controller means and responsive to the send request signal for sequentially polling the plurality of separate processor modules to identify the sender processor module by its place in the sequence; identification means included in the sender processor module and responsive to the poll for generating an identify signal for identifying one of the plurality of separate processor modules as a receiver processor module; interrogation means included in the bus controller means; acknowledgement means for generating a ready signal to indicate that the receiver processor module is ready to receive a transmission; and transmit means for enabling the sender processor module to transmit to the receiver processor module.
- Assignee:
- Tandem Computers Inc., Cupertino, CA
- Patent Number(s):
- US 4807116
- OSTI ID:
- 6215336
- Resource Relation:
- Patent File Date: Filed date 18 May 1987
- Country of Publication:
- United States
- Language:
- English
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