Single-event upset in GaAs E/D MESFET logic

Conference · Fri Nov 30 23:00:00 EST 1990 · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (USA)

OSTI ID:5933571

Hughlock, B W; LaRue, G S; Johnston, A H ^[1]

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1. Boeing Aerospace Co., Seattle, WA (USA)

The single-event upset (SEU) characterization of GaAs enhancement/depletion (E/D) MESFET logic circuits was experimentally performed for five different logic families. The results indicate a large charge collection volume, independent of the logic family. These results can be attributed to a gate edge effect and an enhanced source-drain charge collection mechanism. The consequence of these effects is to increase the upset rate in space by more than two orders of magnitude. Soft-error rates were estimated for each logic family and spanned the range from 2.3 {times} 10{sup {minus}3} to 4.7 {times} 10{sup {minus}4} errors-bit {center dot} day.

• OSTI ID: 5933571
• Report Number(s): CONF-900723--
• Journal Information: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (USA), Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (USA) Vol. 37:6; ISSN 0018-9499; ISSN IETNA
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
426000 -- Engineering-- Components
Electron Devices & Circuits-- (1990-)
440200* -- Radiation Effects on Instrument Components
Instruments
or Electronic Systems
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
ARSENIC COMPOUNDS
ARSENIDES
ELECTRIC CHARGES
ELECTRONIC CIRCUITS
ERRORS
GALLIUM ARSENIDES
GALLIUM COMPOUNDS
LOGIC CIRCUITS
PHYSICAL RADIATION EFFECTS
PNICTIDES
RADIATION EFFECTS