Skip to main content
U.S. Department of Energy
Office of Scientific and Technical Information

Radiation hardness and annealing tests of a custom VLSI device

Conference ·
OSTI ID:5518818

Several NMOS custom VLSI ( Microplex'') circuits have been irradiated with a 500 rad/hr {sup 60}Co source. With power off three of four chips tested have survived doses exceeding 1 Mrad. With power on at a 25% duty cycle, all chips tested failed at doses ranging from 10 to 130 krad. Annealing at 200{degree}C was only partially successful in restoring the chips to useful operating conditions. 10 refs., 4 figs., 1 tab.

Research Organization:
Stanford Linear Accelerator Center, Menlo Park, CA (USA)
Sponsoring Organization:
DOE/ER
DOE Contract Number:
AC03-76SF00515; AA03-76SF00034; AC03-83ER40103
OSTI ID:
5518818
Report Number(s):
SLAC-PUB-4104; CONF-8910179--1; ON: DE89013985
Country of Publication:
United States
Language:
English