Data-driven multiprocessor for switch-level simulation of VLSI circuits
Algorithms, architecture, and performance are described of a computer called the Fast-1 - a special-purpose machine for switch-level simulation of VLSI circuits. The Fast-1 does not implement a previously existing simulation algorithm. Rather its simulation algorithm and its architecture were developed together. The Fast-1 is data-driven, which means that the flow of data determines which instructions to execute next. Data-driven execution has several important attributes: it implements event-driven simulation in a natural way, and it makes parallelism easier to exploit. Although the architecture described has yet to be implemented in hardware, it has itself been simulated using a software implementation that allows performance to be measured in terms of read-modify-write memory cycles. The software-implemented FAST-1 runs at speeds comparable to other software-implemented switch-level simulators. Thus it was possible to collect an extensive set of experimental performance results of the Fast-1 simulating actual circuits, including some with over twenty thousand transistors. These measurements indicate that a hardware-implemented, uniprocessor Fast-1 offers several orders of magnitude speedup over software-implemented simulators running on conventional computers built using similar technology.
- Research Organization:
- Carnegie-Mellon Univ., Pittsburgh, PA (USA)
- OSTI ID:
- 5488435
- Country of Publication:
- United States
- Language:
- English
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