On partitioning of algorithms for parallel execution on VLSI circuit architectures
Exploiting the potential of multiprocessor architectures and VLSI processor arrays requires increased understanding of the partitioning of algorithms for parallel execution. The Data-Flow Scheduling (DFS) algorithm partitions acyclic data-flow graphs for execution on message-based multiprocessor architectures to improve execution time and provides a vehicle for exploring the nature of the partitioning problem. The generality of models used for graphs and multiprocessors makes the DFS applicable to a wide range of algorithms and architectures. The DFS makes use of fine-grained parallelism in the graph being partitioned and allows parallel execution within individual processors as well as among separate processors. A heuristic approach and a divide-and-conquer strategy allow large data flow graphs to be partitioned in reasonable time. The evaluation of the DFS compared simulated execution times of graphs partitioned using the DFS algorithm with simulated execution times of random partitioning and with uniprocessor execution of the same graphs. In total, 600 simulations were conducted, varying key parameters of the graphs and multiprocessors. Analytic models for the partitioning strategies were developed from the simulation results.
- Research Organization:
- Michigan State Univ., East Lansing, MI (USA)
- OSTI ID:
- 6930573
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
990200* -- Mathematics & Computers
ALGORITHMS
ARRAY PROCESSORS
COMPUTER ARCHITECTURE
COMPUTER GRAPHICS
DATA PROCESSING
DATA-FLOW PROCESSING
ELECTRONIC CIRCUITS
INTEGRATED CIRCUITS
MATHEMATICAL LOGIC
MICROELECTRONIC CIRCUITS
PARALLEL PROCESSING
PROCESSING
PROGRAMMING
SIMULATION
TASK SCHEDULING