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Title: Method for deposition of a conductor in integrated circuits

Patent ·
OSTI ID:527788

A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten. 2 figs.

Research Organization:
AT&T
Sponsoring Organization:
USDOE, Washington, DC (United States)
DOE Contract Number:
AC04-76DP00789
Assignee:
Sandia Corp., Albuquerque, NM (United States)
Patent Number(s):
US 5,663,098/A/
Application Number:
PAN: 8-258,911
OSTI ID:
527788
Resource Relation:
Other Information: PBD: 2 Sep 1997
Country of Publication:
United States
Language:
English