Data flow language and interpreter for a reconfigurable distributed data processor
An analytic language and an interpreter whereby an applications data flow graph may serve as an input to a reconfigurable distributed data processor is proposed. The architecture considered consists of a number of loosely coupled computing elements (CES) which may be linked to data and file memories through fully nonblocking interconnect networks. The real-time performance of such an architecture depends upon its ability to alter its topology in response to changes in application, asynchronous data rates and faults. Such a data flow language enhances the versatility of a reconfigurable architecture by allowing the user to specify the machine's topology at a very high level. 11 references.
- OSTI ID:
- 5248136
- Report Number(s):
- CONF-820908-
- Country of Publication:
- United States
- Language:
- English
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