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Problems in VLSI layout design

Thesis/Dissertation ·
OSTI ID:5213384

Two topics in the physical layout of VLSI circuits are treated. One is specialized placement problem and the other a routing problem. The routing problem treated is the routing of a convex grid (defined by Nishizeki, Saito, and Suzuki). Convex grids include the common rectilinear switchbox, as well as L-, T-, and X-shaped regions. The solution to the routing problem includes necessary and sufficient conditions for a convex-grid-routing problem to be routable in the knockknee mode. The algorithm that decides routability is linear in the perimeter of the routing area. The specialized placement problem treated here is motivated by the popularity of the hypercube topology as a communication network between processors of a multiprocessor. In a multiprocessor, one of the determinants of the delay in inter-processor communication is the length of the longest interprocessor bus; this problem is studied in a hypercube by modeling the problem as the graph-theoretic problem of embedding a hypercube onto a mesh, so as to minimize dilation. Two constructions for these embeddings are given. Lower bounds developed on the dilation of any embedding.

Research Organization:
Ohio State Univ., Columbus, OH (USA)
OSTI ID:
5213384
Country of Publication:
United States
Language:
English

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