Timing and area optimization of CMOS combinational-logic circuits accounting for total-dose radiation effects
Conference
·
· IEEE Trans. Nucl. Sci.; (United States)
OSTI ID:5131214
An algorithm for optimizing CMOS VLSI combinational logic circuits for operation in total-dose environments is presented. The width-to-length ratios of the MOS transistors are determined which allow the circuit to meet specified timing requirements while minimizing circuit area. The logic circuit is modeled by an equivalent resistor-capacitor (RC) network, where the resistors and capacitors are functions of transistor width-to-length ratios. The total-dose radiation dependence is modeled as a variation in the resistors. The algorithm has been implemented and tested on example circuits, and the results have been verified using SPICE.
- Research Organization:
- Dept. of Electrical and Computer Engineering, Box 7911, North Carolina State Univ., Raleigh, NC 27695-7911 (US)
- OSTI ID:
- 5131214
- Report Number(s):
- CONF-8707112-
- Conference Information:
- Journal Name: IEEE Trans. Nucl. Sci.; (United States) Journal Volume: NS-34:6
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
36 MATERIALS SCIENCE
360605* -- Materials-- Radiation Effects
42 ENGINEERING
420800 -- Engineering-- Electronic Circuits & Devices-- (-1989)
99 GENERAL AND MISCELLANEOUS
990230 -- Mathematics & Mathematical Models-- (1987-1989)
ALGORITHMS
CAPACITORS
COMPUTER CODES
DOSES
ELECTRICAL EQUIPMENT
ELECTRONIC CIRCUITS
EQUIPMENT
LOGIC CIRCUITS
MATHEMATICAL LOGIC
MOS TRANSISTORS
OPTIMIZATION
PERFORMANCE TESTING
PHYSICAL RADIATION EFFECTS
RADIATION DOSES
RADIATION EFFECTS
RESISTORS
S CODES
SEMICONDUCTOR DEVICES
SEMICONDUCTOR RESISTORS
TESTING
TIMING CIRCUITS
TRANSISTORS
VERIFICATION
360605* -- Materials-- Radiation Effects
42 ENGINEERING
420800 -- Engineering-- Electronic Circuits & Devices-- (-1989)
99 GENERAL AND MISCELLANEOUS
990230 -- Mathematics & Mathematical Models-- (1987-1989)
ALGORITHMS
CAPACITORS
COMPUTER CODES
DOSES
ELECTRICAL EQUIPMENT
ELECTRONIC CIRCUITS
EQUIPMENT
LOGIC CIRCUITS
MATHEMATICAL LOGIC
MOS TRANSISTORS
OPTIMIZATION
PERFORMANCE TESTING
PHYSICAL RADIATION EFFECTS
RADIATION DOSES
RADIATION EFFECTS
RESISTORS
S CODES
SEMICONDUCTOR DEVICES
SEMICONDUCTOR RESISTORS
TESTING
TIMING CIRCUITS
TRANSISTORS
VERIFICATION