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A circuit design for the improvement of radiation hardness in CMOS digital circuits

Journal Article · · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)
DOI:https://doi.org/10.1109/23.277496· OSTI ID:5096313

In this paper a design consideration for digital CMOS circuits that are almost insensitive to radiation is proposed. By adding three N-MOSFET's to the conventional digital CMOS circuits, good radiation hard behavior is observed in inverter, NOR and NAND gates under SPICE simulation. The detailed circuit design consideration and the simulation results are given.

OSTI ID:
5096313
Journal Information:
IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States), Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) Vol. 39:2; ISSN 0018-9499; ISSN IETNA
Country of Publication:
United States
Language:
English