Test structures for total dose testing of SOI (silicon-on-insulator) mosfets

Conference · Fri Jan 01 00:00:00 EST 1988

OSTI ID:5019763

Fleetwood, D M; Tsao, S S

Simple test structures are described that are useful for optimizing the radiation hardness of, and devloping test methods for, silicon-on-insulator integrated circuits. ''Island-edge'' and edgeless n-channel transistors have been fabricated in SIMOX (Separation by Implanted Oxygen) and ZMR (Zone-Melt Recrystallized) material. The island-edge structures were formed with or without hardened sidewall isolation. By comparing the radiation results of these structures, we are able to clearly discriminate top-gate, sidewall, and back-gate parasitic leakage, all of which are very important to control in an ionizing radiation environment. With the application of -5 V substrate bias during irradiation, transistors in SIMOX and ZMR with hardened sidewalls exhibited acceptable characteristics at total doses in excess of 1.0 Mrad(Si). We have also used these test structures to compare the response of SOI transitors to Co-60 and 10-keV x-ray irradiation. We find that as expected from previous studies of oxides of similar thickness, the top-gate and sidewall insulator responses to Co-60 and 10-keV x-ray irradiation differ by less than 20 percent for the ZMR and SIMOX devices. Back-gate response, on the other hand, differed significantly for the two sources. For the SIMOX transistors, with 0.4 ..mu..m buried insulator thickness, the Co-60 irradiation induced up to a 50% overresponse (in terms of back-channel threshold voltage shifts, with O V back-gate bias applied during irradiation), relative to 10-keV x-rays. For the ZMR transistors, with 2.0 ..mu..m buried insulator thickness, the Co-60 response exceeds the x-ray response by up to a factor of 3.

• Research Organization: Sandia National Labs., Albuquerque, NM (USA)
• DOE Contract Number: AC04-76DP00789
• OSTI ID: 5019763
• Report Number(s): SAND-88-1027C; CONF-880492-1; ON: DE88008473
• Resource Relation: Conference: DNA/HDL workshop on test structures for semiconductor device hardening and hardness assurance, Los Angeles, CA, USA, 7 Apr 1988
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
INTEGRATED CIRCUITS
TESTING
DOSE RATES
MOS TRANSISTORS
RADIATION HARDENING
SI SEMICONDUCTOR DETECTORS
ELECTRONIC CIRCUITS
HARDENING
MEASURING INSTRUMENTS
MICROELECTRONIC CIRCUITS
PHYSICAL RADIATION EFFECTS
RADIATION DETECTORS
RADIATION EFFECTS
SEMICONDUCTOR DETECTORS
SEMICONDUCTOR DEVICES
TRANSISTORS
420800* - Engineering- Electronic Circuits & Devices- (-1989)