Skip to main content
U.S. Department of Energy
Office of Scientific and Technical Information

Ion-implanted GaAs JFETs with f{sub t} {gt} 45 GHz for low-power electronics

Conference ·
OSTI ID:460770
; ; ;  [1];  [1]
  1. Sandia National Labs., Albuquerque, NM (United States)

GaAs Junction Field Effect Transistors (JFETs) are reported with gate lengths down to 0.3 micrometers. The structure is fully self-aligned and employs all ion implantation doping. p[sup +]-gate regions are formed with either Zn or Cd implants along with a P coimplantation to reduce diffusion. The source and rain implants are engineered with Si or SiF implants to minimize short channel effects. JFETs with 0.3 micrometer gate length are demonstrated with a sub-threshold slope of 110 mV/decade along with an intrinsic unity current gain cutoff frequency as high as 52 GHz.

Research Organization:
Sandia National Labs., Albuquerque, NM (United States)
Sponsoring Organization:
USDOE Office of Financial Management and Controller, Washington, DC (United States)
DOE Contract Number:
AC04-94AL85000
OSTI ID:
460770
Report Number(s):
SAND--96-2493C; CONF-961127--1; ON: DE97000743
Country of Publication:
United States
Language:
English

Similar Records

High-frequency operation of 0.3 {mu}m GaAs JFETs for low-power electronic
Conference · Sun Sep 01 00:00:00 EDT 1996 · OSTI ID:377622

Ion implantation processing for high-speed GaAs JFETs
Conference · Sat Jul 01 00:00:00 EDT 1995 · OSTI ID:80700

An all-implanted, self-aligned, GaAs JFET with a nonalloyed W/p[sup +]-GaAs ohmic gate contact
Journal Article · Fri Jul 01 00:00:00 EDT 1994 · IEEE Transactions on Electron Devices (Institute of Electrical and Electronics Engineers); (United States) · OSTI ID:6913417