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High-frequency operation of 0.3 {mu}m GaAs JFETs for low-power electronic

Conference ·
OSTI ID:377622
; ; ;  [1];  [2]
  1. Sandia National Labs., Albuquerque, NM (United States)
  2. Microwave Signal, Clarksburg, MD (United States)

GaAs Junction Field Effect Transistors (JFETs) have attracted renewed attention for low-power, low-voltage electronics. JFETs have a significant advantage over MESFETs for low-power operation due to their higher gate barrier to current flow resulting from p/n junction gate. This paper reports recent advances in an all ion implanted self-aligned GaAs JFET with a gate length down to 0.3 {mu}m. By employing shallopw SiF implants next to the gate, dielectric sidewall spacers, and 50 keV source and drain implants, JFETs with a f{sub t} up to 49 GHz with good pinchoff and subthreshold characteristics have been realized. In addition, the JFET benefits from the use of shallow Zn or Cd implantation to form abrupt p{sup +}/n gate profiles.

Research Organization:
Sandia National Labs., Albuquerque, NM (United States)
Sponsoring Organization:
USDOE, Washington, DC (United States)
DOE Contract Number:
AC04-94AL85000
OSTI ID:
377622
Report Number(s):
SAND--96-2005C; CONF-961040--3; ON: DE96014833
Country of Publication:
United States
Language:
English

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