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A Multifunctional Double Pulse Tester for Cascode GaN Devices

Journal Article · · IEEE Translations on Industrial Electronics
 [1];  [2]
  1. Arizona State University, Tempe, AZ (United States); PowerAmerica/NC State University
  2. Arizona State University, Tempe, AZ (United States)

Gallium Nitride (GaN) power devices with low switching and conduction losses can lead to superior power density in numerous power conversion applications. Their fast switching speeds, however, pose challenges in dynamic device characterization. The large parasitic inductances and contact impedances in conventional double pulse testers (DPTs) meant for Si devices, make them unsuitable for GaN characterization. GaN devices are directly soldered on to testers for minimizing parasitic effects. Furthermore, currently different testers are used for different types of device characterization, requiring the device under test (DUT) to be repeatedly soldered to different boards. This paper proposes a multi-functional tester well-suited for GaN devices and capable of completing all the dynamic characterization on the same board. The proposed tester is able to characterize: device turn on and off transition under hard and soft switching, dynamic Rdson, diode reverse recovery and device reverse conduction voltage drop. Here, the proposed tester has been implemented in hardware and the functions are validated with tests on a cascode GaN device. Some special properties of the cascode GaN device seen from these tests are highlighted. Detailed design procedures for selecting the critical components of the double pulse tester are presented.

Research Organization:
North Carolina State University, Raleigh, NC (United States)
Sponsoring Organization:
USDOE
Grant/Contract Number:
EE0006521
OSTI ID:
2446700
Alternate ID(s):
OSTI ID: 1541510
Journal Information:
IEEE Translations on Industrial Electronics, Journal Name: IEEE Translations on Industrial Electronics Journal Issue: 11 Vol. 64; ISSN 0278-0046
Publisher:
IEEECopyright Statement
Country of Publication:
United States
Language:
English

References (16)

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Characterization of an enhancement-mode 650-V GaN HFET conference September 2015
A novel voltage clamp circuit for the measurement of transistor dynamic on-resistance conference May 2012
Mechanisms responsible for dynamic ON-resistance in GaN high-voltage HEMTs conference June 2012
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Breakthroughs for 650-V GaN Power Devices: Stable high-temperature operations and avalanche capability journal September 2015
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A Fast Voltage Clamp Circuit for the Accurate Measurement of the Dynamic ON-Resistance of Power Transistors journal February 2015
Package Parasitic Inductance Extraction and Simulation Model Development for the High-Voltage Cascode GaN HEMT journal April 2014
Understanding the Effect of PCB Layout on Circuit Performance in a High-Frequency Gallium-Nitride-Based Point of Load Converter journal April 2014
Evaluation and Application of 600 V GaN HEMT in Cascode Structure journal May 2014
Avoiding Si MOSFET Avalanche and Achieving Zero-Voltage Switching for Cascode GaN Devices journal January 2016
The development of a high-voltage power device evaluation platform conference October 2014

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