Store operations to maintain cache coherence
Patent
·
OSTI ID:1373722
In one embodiment, a computer-implemented method includes encountering a store operation during a compile-time of a program, where the store operation is applicable to a memory line. It is determined, by a computer processor, that no cache coherence action is necessary for the store operation. A store-without-coherence-action instruction is generated for the store operation, responsive to determining that no cache coherence action is necessary. The store-without-coherence-action instruction specifies that the store operation is to be performed without a cache coherence action, and cache coherence is maintained upon execution of the store-without-coherence-action instruction.
- Research Organization:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- B599858
- Assignee:
- INTERNATIONAL BUSINESS MACHINES CORPORATION
- Patent Number(s):
- 9,720,832
- Application Number:
- 14/671,050
- OSTI ID:
- 1373722
- Resource Relation:
- Patent File Date: 2015 Mar 27
- Country of Publication:
- United States
- Language:
- English
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