FASTBUS Standard Routines implementation for Fermilab embedded processor boards
Conference
·
OSTI ID:10110793
- Fermi National Accelerator Lab., Batavia, IL (United States)
- Southeastern Universities Research Association, Inc., Newport News, VA (United States). Continuous Electron Beam Accelerator Facility
In collaboration with CEBAF, Fermilab`s Online Support Department and the CDF experiment have produced a new implementation of the IEEE FASTBUS Standard Routines for two embedded processor FASTBUS boards: the Fermilab Smart Crate Controller (FSCC) and the FASTBUS Readout Controller (FRC). Features of this implementation include: portability (to other embedded processor boards), remote source-level debugging, high speed, optional generation of very high-speed code for readout applications, and built-in Sun RPC support for execution of FASTBUS transactions and lists over the network.
- Research Organization:
- Fermi National Accelerator Lab., Batavia, IL (United States)
- Sponsoring Organization:
- USDOE, Washington, DC (United States)
- DOE Contract Number:
- AC02-76CH03000
- OSTI ID:
- 10110793
- Report Number(s):
- FNAL/C--92/296; CONF-921005--11; ON: DE93004423
- Country of Publication:
- United States
- Language:
- English
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