FASTBUS standard routines implementation for Fermilab embedded processor boards

Conference · Tue Feb 01 04:00:00 EST 1994 · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)

OSTI ID:6595279

Votava, M; Kent, S; Oleynik, G; Pordes, R; Pangburn, J; Patrick, J ^[1]; Heyes, G; Watson, III, W A ^[2]

---

1. Fermi National Accelerator Lab., Batavia, IL (United States)
2. CEBAF, Newport News, VA (United States)

In collaboration with CEBAF, Fermilab has produced a new C implementation of the IEEE FASTBUS Standard Routines. This implementation runs under the V[sub x] Works operating system and has been ported to the PC-4 revision of the FASTBUS Smart Crate Controller (FSCC) and the FASTBUS Readout Controller (FRC). Both of these boards are used in fixed target and collider HEP experiments. Features of this implementation include: optional generation of high-speed in-line code, built-in RPC (remote procedure call) support, and a TCL (tool command language) command line interpreter interface. The authors describe this software with recent extensions to support RPC.

• DOE Contract Number: AC02-76CH03000
• OSTI ID: 6595279
• Report Number(s): CONF-930640--
• Conference Information: Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) Journal Volume: 41:1Pt1
• Country of Publication: United States
• Language: English

Related Subjects

43 PARTICLE ACCELERATORS
430303 -- Particle Accelerators-- Experimental Facilities & Equipment
440104* -- Radiation Instrumentation-- High Energy Physics Instrumentation
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
ACCELERATORS
COMPUTER CODES
COMPUTERS
COORDINATED RESEARCH PROGRAMS
DATA ACQUISITION SYSTEMS
ELECTRONIC CIRCUITS
FASTBUS SYSTEM
HIGH ENERGY PHYSICS
MICROELECTRONIC CIRCUITS
MICROPROCESSORS
PHYSICS
PROGRAMMING LANGUAGES
READOUT SYSTEMS
RESEARCH PROGRAMS